Abstract: The present invention corrects the insufficient peripheral light amount due to the lens shading and correcting the non-uniformity of light amount at the periphery due to a distortion resulting from a precision of the lens or a poor mounting precision of the lens. A peripheral light amount correction circuit is structured by an image synchronization signal generation circuit, a coordinate conversion circuit and a luminance value correction computing circuit. An integrated value of luminance values is calculated at the coordinate conversion circuit to extract light amount information. Coordinate values to be input to the luminance value correction computing circuit are generated based on an integrated/averaged value of the light amount information. In the luminance value correction computing circuit, peripheral light amount correction functions are converted based on the input coordinate values from the coordinate conversion circuit to perform appropriate correction on the input image.

Abstract: An image data serial signal output from the parallel-serial converting circuit 21 is converted into a differential amplitude signal by the LVDS transmitter 22 in such a manner that the amplitude of the differential voltage of the image data parallel signal varies depending on the value of the synchronization code serial signal. Accordingly, the signal values of the synchronization code serial signal and the image data serial signal are simultaneously transmitted. On the reception side, the differential amplitude signal in which the amplitude of the differential voltage of the image data serial signal varies depending on the value of the synchronization code serial signal is received by the LVDS receiver 31. The signal values of the synchronization code serial signal and the image data serial signal are separated and output based on a predetermined comparison processing.

Abstract: The present invention corrects the insufficient peripheral light amount due to the lens shading and correcting the non-uniformity of light amount at the periphery due to a distortion resulting from a precision of the lens or a poor mounting precision of the lens. A peripheral light amount correction circuit is structured by an image synchronization signal generation circuit, a coordinate conversion circuit and a luminance value correction computing circuit. An integrated value of luminance values is calculated at the coordinate conversion circuit to extract light amount information. Coordinate values to be input to the luminance value correction computing circuit are generated based on an integrated/averaged value of the light amount information. In the luminance value correction computing circuit, peripheral light amount correction functions are converted based on the input coordinate values from the coordinate conversion circuit to perform appropriate correction on the input image.

Abstract: An image data serial signal output from the parallel-serial converting circuit 21 is converted into a differential amplitude signal by the LVDS transmitter 22 in such a manner that the amplitude of the differential voltage of the image data parallel signal varies depending on the value of the synchronization code serial signal. Accordingly, the signal values of the synchronization code serial signal and the image data serial signal are simultaneously transmitted. On the reception side, the differential amplitude signal in which the amplitude of the differential voltage of the image data serial signal varies depending on the value of the synchronization code serial signal is received by the LVDS receiver 31. The signal values of the synchronization code serial signal and the image data serial signal are separated and output based on a predetermined comparison processing.

Abstract: An image processing device of the present invention includes a plurality of processing sections for successively receiving and decoding a plurality of data blocks, which have been obtained by encoding a plurality of image blocks of an image. The plurality of processing sections include an inverse discrete cosine transform processing section for performing two-dimensional inverse discrete cosine transform. When one of the processing sections is unable to receive the data block, the one of the processing sections sends a busy signal to preceding one of the processing sections. When one of processing sections receives the busy signal, the one of the processing sections discontinues data block transfer to following one of the processing sections.

Abstract: The present invention provides a power consumption reduced register circuit which performs data processing in low power consuming and no wasteful manner. Reduction in power consumption of a synchronous circuit for accepting and outputting of data in synchronization with clock signals is achieved. An input to and output from a register are monitored and compared for outputting a determination result signal. A logical sum of an input determination control signal and the determination result signal is obtained in an OR gate, the output of which is latched to a D type flip-flop in synchronization with an invented signal of a clock signal input to the register. A logical product of the output of the flip-flop and the clock signal is obtained by an AND gate, the output signal from which is applied to the register as a clock signal.

Abstract: A block distortion corrector for providing to recovery image data a block distortion correcting process in which a distortion of recovery image data between neighboring image blocks is corrected, the recovery image data being recovered by an expanding process from image data which are compressed and transmitted in units of image blocks corresponding to the prescribed number of pixels, includes an edge detector for detecting whether or not there exits an edge due to the distortion of the image data at a boundary to the neighboring image block by comparing with a reference value a signal level difference between image data of a to-be-processed pixel located at a boundary of neighboring image block and image data of a pixel which is located in an image block different from the image block of the to-be-processed pixel and is in the vicinity of the to-be-processed pixal.

Abstract: An image input section selects a plurality of sample points from an input image, and passes the density values of the sample points and pixels around them to a feature parameter extractor. The feature parameter extractor calculates the feature parameters of each sample point and passes them to a density modification function generator. The density modification function generator creates a density modification function for each sample point and passes the density modification function data to a density modification function modifier. The density modification function modifier determines a density modification function for all of the pixels, including those other than the sample points, and passes this density modification function data to a processor. The processor modifies image data delivered from the image input section, and passes the modified image data to a modified image output section.