Patents by Inventor Yasuki Kimishima

Yasuki Kimishima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11871515
    Abstract: A wiring substrate includes an insulating layer having a through hole, a first conductor layer formed on a first surface of the insulating layer, a second conductor layer formed on a second surface of the insulating layer, an interlayer connection conductor formed in the through hole such that the interlayer connection conductor is connecting the first and second conductor layers, and a resin body formed in the through hole of the insulating layer such that a volume occupancy rate of the resin body is in a range of 30% to 55% in the through hole. The interlayer connection conductor is formed such that the interlayer connection conductor has a length in a range of 1000 ?m to 2000 ?m in a thickness direction of the insulating layer and that a volume occupancy rate of the interlayer connection conductor is in a range of 45% to 70% in the through hole.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: January 9, 2024
    Assignee: IBIDEN CO., LTD.
    Inventors: Yasuki Kimishima, Satoru Kawai
  • Patent number: 11856699
    Abstract: An inductor built-in substrate includes a core substrate having openings and first through holes formed therein, a magnetic resin filling the openings and having second through holes formed therein, first through-hole conductors formed in the first through holes respectively such that each of the first through-hole conductors includes an electroless plating film and an electrolytic plating film, and second through-hole conductors formed in the second through holes respectively such that each of the second through-hole conductors includes an electroless plating film and an electrolytic plating film. The first through-hole conductors and the second through-hole conductors are formed such that a thickness of the electroless plating film in the first through-hole conductors is larger than a thickness of the electroless plating film in the second through-hole conductors.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: December 26, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Satoru Kawai, Yasuki Kimishima
  • Publication number: 20230254979
    Abstract: A wiring substrate includes a first insulating layer, a first conductor layer formed on the first insulating layer, a second insulating layer formed on the first conductor layer, a second conductor layer formed on the second insulating layer, and a via conductor formed in the second insulating layer such that the via conductor is connecting the first and second conductor layers. The second insulating layer has a via hole in which the via conductor is formed, and the via conductor includes a first plating film and a second plating film such that the first plating film has a bottom portion formed at bottom of the via hole and a side portion formed on side of the via hole and separated from the bottom portion by gap and that the second plating film is covering the gap of the first plating film and at least part of the first plating film.
    Type: Application
    Filed: February 6, 2023
    Publication date: August 10, 2023
    Applicant: IBIDEN CO., LTD.
    Inventor: Yasuki KIMISHIMA
  • Patent number: 11330713
    Abstract: A printed wiring board includes an insulating substrate having openings, a first conductor layer formed on a first surface of the insulating substrate, a second conductor layer formed on a second surface of the insulating substrate, magnetic material portions formed in the openings of the insulating substrate and having through holes extending from the first surface to second surface of the insulating substrate, and through-hole conductors formed on side walls of the through holes such that the through-hole conductors connect the first conductor layer and second conductor layer. The magnetic material portions include magnetic particles and resin such that the magnetic particles include particles forming the side walls and that gaps are formed between the particles and the resin, and each of the through-hole conductors includes a chemical copper plating film such that the chemical copper plating film is deposited in the gaps formed between the particles and the resin.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: May 10, 2022
    Assignee: IBIDEN CO., LTD.
    Inventors: Satoru Kawai, Yasuki Kimishima
  • Publication number: 20220104353
    Abstract: A wiring substrate includes an insulating layer having a through hole, a first conductor layer formed on a first surface of the insulating layer, a second conductor layer formed on a second surface of the insulating layer, an interlayer connection conductor formed in the through hole such that the interlayer connection conductor is connecting the first and second conductor layers, and a resin body formed in the through hole of the insulating layer such that a volume occupancy rate of the resin body is in a range of 30% to 55% in the through hole. The interlayer connection conductor is formed such that the interlayer connection conductor has a length in a range of 1000 ?m to 2000 ?m in a thickness direction of the insulating layer and that a volume occupancy rate of the interlayer connection conductor is in a range of 45% to 70% in the through hole.
    Type: Application
    Filed: September 29, 2021
    Publication date: March 31, 2022
    Applicant: IBIDEN CO., LTD.
    Inventors: Yasuki KIMISHIMA, Satoru KAWAI
  • Patent number: 11291118
    Abstract: An inductor built-in substrate includes a core substrate having an opening and a first through hole formed therein, a magnetic resin filling the opening and having a second through hole formed therein, a first through-hole conductor including a metal film formed in the first through hole, and a second through-hole conductor including a metal film formed in the second through hole. The core substrate and the magnetic resin are formed such that a surface in the first through hole has a roughness that is larger than a roughness of a surface in the second through hole.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: March 29, 2022
    Assignee: IBIDEN CO., LTD.
    Inventors: Satoru Kawai, Yasuki Kimishima
  • Publication number: 20210329783
    Abstract: A printed wiring board includes an insulating substrate having openings, a first conductor layer formed on a first surface of the insulating substrate, a second conductor layer formed on a second surface of the insulating substrate, magnetic material portions formed in the openings of the insulating substrate and having through holes extending from the first surface to second surface of the insulating substrate, and through-hole conductors formed on side walls of the through holes such that the through-hole conductors connect the first conductor layer and second conductor layer. The magnetic material portions include magnetic particles and resin such that the magnetic particles include particles forming the side walls and that gaps are formed between the particles and the resin, and each of the through-hole conductors includes a chemical copper plating film such that the chemical copper plating film is deposited in the gaps formed between the particles and the resin.
    Type: Application
    Filed: April 14, 2021
    Publication date: October 21, 2021
    Applicant: IBIDEN CO., LTD.
    Inventors: Satoru KAWAI, Yasuki KIMISHIMA
  • Publication number: 20210298178
    Abstract: An inductor built-in substrate includes a core substrate having an opening and a first through hole formed therein, a magnetic resin filling the opening and having a second through hole formed therein, a first through-hole conductor including a metal film formed in the first through hole, and a second through-hole conductor including a metal film formed in the second through hole. The core substrate and the magnetic resin are formed such that a surface in the first through hole has a roughness that is larger than a roughness of a surface in the second through hole.
    Type: Application
    Filed: February 25, 2021
    Publication date: September 23, 2021
    Applicant: IBIDEN CO., LTD.
    Inventors: Satoru KAWAI, Yasuki KIMISHIMA
  • Patent number: 11122686
    Abstract: A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulting layer on the opposite side, and interlayer connection conductors formed in the through holes through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the though holes include first and second groups of through holes and that the through holes in the second group have inner walls covered with non-conductive resin, and the interlayer conductors includes first interlayer conductors each including a plating film formed in the first group of through holes, and second interlayer conductors each including a plating film formed in the second group of through holes such that minimum distance between the second interlayer conductors is smaller than minimum distance between the first interlayer conductors.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: September 14, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Yasuki Kimishima, Satoru Kawai
  • Publication number: 20210259107
    Abstract: A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulting layer on the opposite side, and interlayer connection conductors formed in the through holes through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the though holes include first and second groups of through holes and that the through holes in the second group have inner walls covered with non-conductive resin, and the interlayer conductors includes first interlayer conductors each including a plating film formed in the first group of through holes, and second interlayer conductors each including a plating film formed in the second group of through holes such that minimum distance between the second interlayer conductors is smaller than minimum distance between the first interlayer conductors.
    Type: Application
    Filed: December 23, 2020
    Publication date: August 19, 2021
    Applicant: IBIDEN CO., LTD.
    Inventors: Yasuki KIMISHIMA, Satoru KAWAI
  • Publication number: 20210251087
    Abstract: A printed wiring board includes an insulating substrate, a first conductor layer formed on a first surface of the substrate, a second conductor layer formed on a second surface of the substrate, and through-hole conductors formed through the substrate and connecting the first and second conductor layers. The substrate has openings formed such that each opening extends from the first to second surfaces of the substrate, and magnetic material filling the openings and forming through holes such that each through hole extends from the first to second surfaces of the substrate, the through-hole conductors are formed on sidewalls of the through holes in the magnetic material, and the magnetic material includes resin and particles including magnetic metal such that the particles include a group of particles forming the sidewalls of the through holes and that each particle in the group has a substitution plating film formed on a surface thereof.
    Type: Application
    Filed: January 26, 2021
    Publication date: August 12, 2021
    Applicant: IBIDEN CO., LTD.
    Inventors: Satoru KAWAI, Yasuki KIMISHIMA
  • Publication number: 20210195748
    Abstract: An inductor built-in substrate includes a core substrate having openings and first through holes formed therein, a magnetic resin filling the openings and having second through holes formed therein, first through-hole conductors formed in the first through holes respectively such that each of the first through-hole conductors includes an electroless plating film and an electrolytic plating film, and second through-hole conductors formed in the second through holes respectively such that each of the second through-hole conductors includes an electroless plating film and an electrolytic plating film. The first through-hole conductors and the second through-hole conductors are formed such that a thickness of the electroless plating film in the first through-hole conductors is larger than a thickness of the electroless plating film in the second through-hole conductors.
    Type: Application
    Filed: December 16, 2020
    Publication date: June 24, 2021
    Applicant: IBIDEN CO., LTD.
    Inventors: Satoru Kawai, Yasuki Kimishima
  • Publication number: 20210159010
    Abstract: An inductor built-in substrate includes a core substrate having an opening and a first through hole formed therein, a magnetic resin filling the opening of the core substrate and having a second through hole formed therein, a first through-hole conductor including a metal film formed in the first through hole of the core substrate, and a second through-hole conductor including a metal film formed in the second through hole of the magnetic resin. The magnetic resin includes a resin material and magnetic particles such that the metal film of the second through-hole conductor is in contact with the magnetic particles.
    Type: Application
    Filed: November 24, 2020
    Publication date: May 27, 2021
    Applicant: IBIDEN CO., LTD.
    Inventors: Satoru KAWAI, Yasuki KIMISHIMA
  • Patent number: 9313901
    Abstract: A printed wiring board includes an insulative resin substrate having a penetrating hole, a first conductive layer formed on first surface of the substrate, a second conductive layer formed on second surface of the substrate on the opposite side, and a through-hole conductor formed in the penetrating hole and connecting the first and second conductive layers. The through-hole conductor includes a seed layer on inner wall of the penetrating hole, a first electrolytic plated layer on the seed layer such that the first plated layer is filling the space formed by the seed layer in the penetrating hole and forming recesses at the ends of the penetrating hole, respectively, and second electrolytic plated layers filling the recesses, respectively, and the second plated layers includes electrolytic plating having an average crystalline particle diameter greater than an average crystalline particle diameter of electrolytic plating forming the first plated layer.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: April 12, 2016
    Assignee: IBIDEN CO., LTD.
    Inventors: Kazuki Kajihara, Yasuki Kimishima
  • Publication number: 20150034378
    Abstract: A printed wiring board includes an insulative resin substrate having a penetrating hole, a first conductive layer formed on first surface of the substrate, a second conductive layer formed on second surface of the substrate on the opposite side, and a through-hole conductor formed in the penetrating hole and connecting the first and second conductive layers. The through-hole conductor includes a seed layer on inner wall of the penetrating hole, a first electrolytic plated layer on the seed layer such that the first plated layer is filling the space formed by the seed layer in the penetrating hole and forming recesses at the ends of the penetrating hole, respectively, and second electrolytic plated layers filling the recesses, respectively, and the second plated layers includes electrolytic plating having an average crystalline particle diameter greater than an average crystalline particle diameter of electrolytic plating forming the first plated layer.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 5, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Kazuki KAJIHARA, Yasuki Kimishima
  • Patent number: 8552312
    Abstract: A printed wiring board including a substrate having first and second surfaces and a penetrating hole extending through the substrate between the surfaces, a first conductive circuit on the first surface, a second conductive circuit on the second surface, and a through-hole conductor in the hole and connecting the first and second conductive circuits. The conductor includes an electroless plated film on the inner-wall surface of the hole, a first electrolytic plated film formed on the electroless plated film and forming a first opening portion opening on the first surface and a second opening portion opening on the second surface, a second electrolytic plated film filling the first portion, and a third electrolytic plated film filling the second portion. The first and second portions taper toward the central portion of the hole with respect to the axis direction of the hole and have cross sections forming a substantially U-shape, respectively.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: October 8, 2013
    Assignee: Ibiden Co., Ltd.
    Inventors: Satoru Kawai, Yasuki Kimishima
  • Publication number: 20110120762
    Abstract: A printed wiring board including a substrate having first and second surfaces and a penetrating hole extending through the substrate between the surfaces, a first conductive circuit on the first surface, a second conductive circuit on the second surface, and a through-hole conductor in the hole and connecting the first and second conductive circuits. The conductor includes an electroless plated film on the inner-wall surface of the hole, a first electrolytic plated film formed on the electroless plated film and forming a first opening portion opening on the first surface and a second opening portion opening on the second surface, a second electrolytic plated film filling the first portion, and a third electrolytic plated film filling the second portion. The first and second portions taper toward the central portion of the hole with respect to the axis direction of the hole and have cross sections forming a substantially U-shape, respectively.
    Type: Application
    Filed: November 12, 2010
    Publication date: May 26, 2011
    Applicant: IBIDEN CO., LTD.
    Inventors: Satoru KAWAI, Yasuki Kimishima