Patents by Inventor Yasuki TORIGOSHI

Yasuki TORIGOSHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9620289
    Abstract: According to an embodiment, first and second internal electrode layers are alternatively interposed between dielectric layers to form a laminated capacitor. The first internal electrode layer have a first base portion connected to a first external electrode, and is extended from the first base portion toward a second external electrode. The second internal electrode layer have a base portion connected to the second external electrode, and is extended from the second external electrode toward the first external electrode. The second internal electrode layer is formed in a deformation pattern which allows a path length greater than a length between the first and the second external electrode so that an open stub producing an open stub resonance is formed.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: April 11, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuki Torigoshi, Nobuyuki Kasai
  • Publication number: 20150366069
    Abstract: According to one embodiment, an apparatus includes: a device configured to partially provide a second conductor layer on a surface of a first conductor layer; a device configured to partially provide a first insulating layer on the surface of the first conductor layer; a device configured to integrate the first conductor layer, the second conductor layer, the first insulating layer, and a third conductor layer, in a state in which the second conductor layer and the first insulating layer provided on the surface of the first conductor layer are covered with the third conductor layer from a side opposite the first conductor layer; a device configured to form a conductor pattern by partially removing at least one of the first conductor layer and the third conductor layer in a structure obtained by the integrating; and a device configured to cover both sides of the structure.
    Type: Application
    Filed: August 26, 2015
    Publication date: December 17, 2015
    Inventors: Akihiko Happoya, Yasuki Torigoshi, Sadahiro Tamai
  • Publication number: 20150349436
    Abstract: According to one embodiment, an electrical terminal assembly includes an internal contact at one end portion, the internal contact being connected to a connector terminal, an external contact at the other end portion, and a fixing portion between the internal contact and the external contact, the fixing portion fixing a wire. The external contact is outside a connector when the electrical terminal assembly is inserted into the connector.
    Type: Application
    Filed: December 17, 2014
    Publication date: December 3, 2015
    Inventor: Yasuki Torigoshi
  • Publication number: 20150348674
    Abstract: According to one embodiment, a transmission cable in one embodiment generally includes at least two cables. Each of the cables includes a central conductor including an axis and an outer circumference and an insulator covering the outer circumference of the central conductor, and including an insulation surface and grooves in the insulation surface.
    Type: Application
    Filed: December 15, 2014
    Publication date: December 3, 2015
    Inventor: Yasuki Torigoshi
  • Patent number: 9155203
    Abstract: According to one embodiment, an apparatus includes: a device configured to partially provide a second conductor layer on a surface of a first conductor layer; a device configured to partially provide a first insulating layer on the surface of the first conductor layer; a device configured to integrate the first conductor layer, the second conductor layer, the first insulating layer, and a third conductor layer, in a state in which the second conductor layer and the first insulating layer provided on the surface of the first conductor layer are covered with the third conductor layer from a side opposite the first conductor layer; a device configured to form a conductor pattern by partially removing at least one of the first conductor layer and the third conductor layer in a structure obtained by the integrating; and a device configured to cover both sides of the structure.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: October 6, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiko Happoya, Yasuki Torigoshi, Sadahiro Tamai
  • Publication number: 20150146344
    Abstract: According to an embodiment, first and second internal electrode layers are alternatively interposed between dielectric layers to form a laminated capacitor. The first internal electrode layer have a first base portion connected to a first external electrode, and is extended from the first base portion toward a second external electrode. The second internal electrode layer have a base portion connected to the second external electrode, and is extended from the second external electrode toward the first external electrode. The second internal electrode layer is formed in a deformation pattern which allows a path length greater than a length between the first and the second external electrode so that an open stub producing an open stub resonance is formed.
    Type: Application
    Filed: September 2, 2014
    Publication date: May 28, 2015
    Inventors: Yasuki Torigoshi, Nobuyuki Kasai
  • Patent number: 8742264
    Abstract: According to one embodiment, an electronic apparatus includes a housing and a flexible printed wiring board in the housing. The flexible printed wiring board includes a via, an insulator, a first conductive pattern, and a second conductive pattern. The insulator around the via includes a first surface and a second surface opposite to the first surface. The first conductive pattern is connected to the via on the first surface. The second conductive pattern is connected to the via on the second surface.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: June 3, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiko Happoya, Yasuki Torigoshi, Sadahiro Tamai
  • Publication number: 20130081568
    Abstract: According to one embodiment, an apparatus includes: a device configured to partially provide a second conductor layer on a surface of a first conductor layer; a device configured to partially provide a first insulating layer on the surface of the first conductor layer; a device configured to integrate the first conductor layer, the second conductor layer, the first insulating layer, and a third conductor layer, in a state in which the second conductor layer and the first insulating layer provided on the surface of the first conductor layer are covered with the third conductor layer from a side opposite the first conductor layer; a device configured to form a conductor pattern by partially removing at least one of the first conductor layer and the third conductor layer in a structure obtained by the integrating; and a device configured to cover both sides of the structure.
    Type: Application
    Filed: May 3, 2012
    Publication date: April 4, 2013
    Inventors: Akihiko Happoya, Yasuki Torigoshi, Sadahiro Tamai
  • Publication number: 20130003322
    Abstract: According to one embodiment, an electronic apparatus includes a housing and a flexible printed wiring board in the housing. The flexible printed wiring board includes a via, an insulator, a first conductive pattern, and a second conductive pattern. The insulator around the via includes a first surface and a second surface opposite to the first surface. The first conductive pattern is connected to the via on the first surface. The second conductive pattern is connected to the via on the second surface.
    Type: Application
    Filed: February 28, 2012
    Publication date: January 3, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akihiko Happoya, Yasuki Torigoshi, Sadahiro Tamai
  • Publication number: 20110094784
    Abstract: According to one embodiment, a plurality of conductive-paste-filling openings are provided in the cover layer to align with the conductive pattern portion, and a plurality of conductive portions are formed by filling conductive paste in the plurality of conductive-paste-filling openings to conductively join the metal layer to the conductive pattern portion.
    Type: Application
    Filed: December 21, 2010
    Publication date: April 28, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kiyomi MURO, Yasuki TORIGOSHI
  • Publication number: 20100025085
    Abstract: According to one embodiment, an electronic apparatus includes a casing and a flexible printed wiring board contained in the casing. The flexible printed wiring board includes an insulating layer, which is sheet-like, a signal line formed on a first surface of the insulating layer, and a ground layer, which is conductive and formed on a second surface of the insulating layer opposite to the first surface. The ground layer includes a mesh portion having a mesh structure and a thin film portion which fills cells in the mesh structure of the mesh portion.
    Type: Application
    Filed: April 9, 2009
    Publication date: February 4, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuki Torigoshi, Kiyomi Muro
  • Publication number: 20090242253
    Abstract: According to one embodiment, a plurality of conductive-paste-filling openings are provided in the cover layer to align with the conductive pattern portion, and a plurality of conductive portions are formed by filling conductive paste in the plurality of conductive-paste-filling openings to conductively join the metal layer to the conductive pattern portion.
    Type: Application
    Filed: December 29, 2008
    Publication date: October 1, 2009
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kiyomi MURO, Yasuki TORIGOSHI
  • Publication number: 20090188702
    Abstract: An embodiment of a flexible printed wiring board includes: a base layer comprising one surface and the other surface, the one surface being exposed; a signal layer formed on the other surface of the base layer; a cover layer stacked on the base layer to cover the signal layer; and a ground layer coated on the cover layer to cover the signal layer, the ground layer comprising a conductive paste in which metal powder and metal nanoparticles are mixed.
    Type: Application
    Filed: December 12, 2008
    Publication date: July 30, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kiyomi Muro, Akihiko Happoya, Yasuki Torigoshi
  • Publication number: 20090055846
    Abstract: According to one embodiment, an optical disk drive apparatus has a case, a disk tray, a first connector, a second connector, and a positioning mechanism. The first connector is provided on the case. The second connector is provided on the disk tray, has a conduction with the first connector when the disk tray is in a first position, and is separated from the first connector when the disk tray is in a second position. The positioning mechanism is provided between the case and the disk tray, and positions the second connector with respect to the first connector when the disk tray moves from the second position to the first position.
    Type: Application
    Filed: April 22, 2008
    Publication date: February 26, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yasuki Torigoshi