Patents by Inventor Yasumasa Kashima
Yasumasa Kashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145519Abstract: To provide a photo detection device and a manufacturing method thereof, the photo detection device comprising a SPAD in which a substrate-manufacturing cost is kept sufficiently low compared to InGaAs, afterpulsing is less and DCR is also reduced. A photo detection device detecting an incident light from an object, comprising: (i) a P-type silicon (Si) substrate; (ii) a P-type germanium (Ge) layer formed by epitaxial growth on a first surface serving as a front surface of the P-type silicon (Si) substrate; and (iii) a P-type thin film silicon (Si) layer formed on the P-type germanium (Ge) layer, (iv) wherein the P-type thin film silicon (Si) layer is divided into a first region and a second region by a Shallow Trench Isolation (STI), multiple single photon avalanche diodes (SPADs) arranged in an array are formed in the first region, and a CMOS transistor circuit driving the SPADs is formed in the second region.Type: ApplicationFiled: March 16, 2022Publication date: May 2, 2024Applicant: Optohub Co., LtdInventors: Ikuo KURACHI, Hiroshi TAKANO, Yasumasa KASHIMA
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Publication number: 20220199661Abstract: The semiconductor image sensor of the present invention comprises a light receiving element formed in a silicon substrate under an insulation film of an SOI substrate comprising the silicon substrate, the insulation film formed on the silicon substrate, and a semiconductor layer formed on the insulation film, and composed of a pn junction diode formed in a vertical direction to a main surface of the silicon substrate and having sensitivity to near-infrared light, and a high voltage generating circuit configured to generate an applied voltage for applying a reverse bias voltage to the pn junction diode, and an impurity concentration of the silicon substrate is in a range of 1×1012/cm3 to 1×1014/cm3, a film thickness is in a range of 300 ?m to 700 ?m, and the applied voltage is in a range of 10 V to 60 V.Type: ApplicationFiled: April 10, 2020Publication date: June 23, 2022Applicant: Optohub Co., LtdInventors: Ikuo KURACHI, Hiroshi TAKANO, Yasumasa KASHIMA
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Patent number: 6570189Abstract: A semiconductor device includes a substrate formed of a group III element and a group V element, a buffer layer having a thickness of at least 0.5 &mgr;m covering an the entire main surface of the substrate, and a selective-area growth layer grown selectively on the buffer layer. The buffer layer includes both the group III element and the group V element. The buffer layer is formed by metalorganic vapor-phase epitaxy.Type: GrantFiled: December 7, 1999Date of Patent: May 27, 2003Assignee: Oki Electric Industry Co., Ltd.Inventors: Yasumasa Kashima, Tsutomu Munakata
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Patent number: 6562649Abstract: A compound semiconductor light emitting device that can keep the effect of confining carriers into an active layer and that can improve light emission efficiency. In the device having a first conductive type substrate; and active layer on the first conductive type substrate; a second conductive type sub-layer and a first conductive type sub-layer, in this order from a lower portion to an upper portion of the device, on the first conductive type substrate and at both sides of the active layer; a second conductive type cladding layer on/over the active layer and the first conductive type sub-layer; and a second conductive type contact layer on the second conductive type cladding layer 19. A p-type diffusion barrier layer is further formed between the n-type sub-layer and the p-type cladding layer.Type: GrantFiled: August 26, 2002Date of Patent: May 13, 2003Assignee: Oki Electric Industry Co., Ltd.Inventors: Tsutomu Munakata, Yasumasa Kashima
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Publication number: 20030002554Abstract: The compound semiconductor light emitting device can keep the effect of confining carrier into an active layer and improve light emission efficiency. In the device having the first conductive type substrate 11; the active layer 12 on the first conductive type substrate 11; the second conductive type sub-layer 15 and the first conductive type sub-layer 17, in this order from the lower to the upper, on the first conductive type substrate 11 and at both sides of the active layer 12; the second conductive type cladding layer 19 on/over the active layer 12 and the first conductive type sub-layer 17; and the second conductive type contact layer 21 on the second conductive type cladding layer 19; the p-type diffusion barrier layer 23 is further formed between the n-type sub-layer 17 and the p-type cladding layer 19.Type: ApplicationFiled: August 26, 2002Publication date: January 2, 2003Inventors: Tsutomu Munakata, Yasumasa Kashima
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Patent number: 6470038Abstract: A compound semiconductor light emitting device that confines carriers into an active layer and that has improved light emission efficiency. The device has a first conductive type substrate; an active layer on the first conductive type substrate; a second conductive type sub-layer and a first conductive type sub-layer, in this order from a lower portion to an upper portion of the device, on the first conductive type substrate and at both sides of the active layer; a second conductive type cladding layer on/over the active layer and the first conductive type sub-layer; and a second conductive type contact layer on the second conductive type cladding layer. A p-type diffusion barrier layer is further formed between the n-type sub-layer and the p-type cladding layer.Type: GrantFiled: September 28, 1998Date of Patent: October 22, 2002Assignee: Oki Electric Industry Co., Ltd.Inventors: Tsutomu Munakata, Yasumasa Kashima
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Patent number: 6083813Abstract: The method for forming the compound semiconductor device includes the step of forming a buffer layer so as to cover the periodic corrugation on the InP substrate, wherein the buffer layer forms using a crystal growth temperature lower than the preferred crystal growth temperature. Accordingly, the method for forming the compound semiconductor device can avoid a shape change and a thickness change because of defect of the periodic corrugation. Further, the compound semiconductor device includes a buffer layer formed so as to cover the periodic corrugation on the InP substrate, wherein the buffer layer forms using a crystal growth temperature lower than the preferred crystal growth temperature. Accordingly, the compound semiconductor device can get superior characteristics of the compound semiconductor device.Type: GrantFiled: April 16, 1998Date of Patent: July 4, 2000Assignee: Oki Electric Industry Co., Ltd.Inventor: Yasumasa Kashima
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Patent number: 6013539Abstract: An edge emitting LED comprises a semiconductor substrate having a main surface, an active layer formed over the main surface, and the active layer having a light emitting region, an optical absorption region having a bandgap energy smaller than that of the light emitting region, and a composition change region formed between the light emitting region and the optical absorption region, the composition change region having the bandgap energy continuously changes. Accordingly, an edge emitting LED is able to produce a stable, spontaneous emission of a light under a wide range of operating conditions.Type: GrantFiled: January 7, 1998Date of Patent: January 11, 2000Assignee: Oki Electric Industry Co., Ltd.Inventors: Yasumasa Kashima, Tsutomu Munakata
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Patent number: 6008066Abstract: A light-emitting diode 10 showing stable temperature characteristics achieved by reliably preventing stimulated emission regardless of temperature changes, comprising:a pair of clad layers 12, 14 and a pair of block layers 16, 17 formed on said substrate 11;an active layer 13 formed, between said clad layers 12, 14 and between said block layers 16, 17, surrounded jointly by said layers 12, 14, 16, 17,wherein in said continuous active layer 13, light-emitting portions 13a, 13b for emitting light when receiving injected carriers, and a light-absorbing portion 13c for absorbing the light coming from said light-emitting portions 13a, 13b are formed continuously.Type: GrantFiled: May 12, 1998Date of Patent: December 28, 1999Assignee: Oki Electric Industry Co., Ltd.Inventors: Yasumasa Kashima, Tsutomu Munakata
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Patent number: 5994158Abstract: A method of fabricating an abrupt hetero interface by organometallic vapor growth comprises supplying a first Group III source gas at a predetermined flow rate and a first Group V source gas at a predetermined flow rate to a growth chamber during a first growth process to form a first Group III-Group V compound layer. During a growth interruption process, the inflow of the first Group III source gas to the growth chamber is stopped, while the supply of the first Group V source gas to the growth chamber is continued, to thereby interrupt the growth of the first Group III-Group V compound layer. Finally, during a second growth process, the first Group V source gas flowing into the growth chamber is switched to a second Group V source gas, and a second Group III source gas is simultaneously supplied at a predetermined flow rate to the growth chamber, thereby forming a second Group III-Group V compound layer on the first Group III-Group V compound layer.Type: GrantFiled: January 24, 1997Date of Patent: November 30, 1999Assignee: Oki Electric Industry Co., Ltd.Inventors: Yasumasa Kashima, Tsutomu Munakata
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Patent number: 5889294Abstract: An edge emitting LED comprises a semiconductor substrate having a main surface, an active layer formed over the main surface, and the active layer having a light emitting region, an optical absorption region having a bandgap energy smaller than that of the light emitting region, and a composition change region formed between the light emitting region and the optical absorption region, the composition change region having the bandgap energy continuously changes. Accordingly, an edge emitting LED is able to produce a stable, spontaneous emission of a light under a wide range of operating conditions.Type: GrantFiled: February 25, 1997Date of Patent: March 30, 1999Assignee: Oki Electric Industry Co., Ltd.Inventors: Yasumasa Kashima, Tsutomu Munakata
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Patent number: 5828085Abstract: An active layer of a light-emitting diode is surrounded jointly by a pair of clad layers and a pair of block layers. The active layer includes a light-emitting portion and a light-absorbing portion which are continuously formed in one body. The light-emitting portion emits light when carriers are injected thereinto between the pair of clad layers, and the light-absorbing portion absorbs light coming from the light-emitting portion. A bandgap of the light-absorbing portion may be smaller than that of the light-emitting portion.Type: GrantFiled: August 6, 1997Date of Patent: October 27, 1998Assignee: Oki Electric Industry Co., Ltd.Inventors: Yasumasa Kashima, Tsutomu Munakata
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Patent number: 5034955Abstract: A superluminescent diode has an active layer confined in a channel cut into current blocking layers on a semiconductor substrate. This structure gives a small output beam diameter and high coupling efficiency, even when coupled into single-mode fiber. At the end of the channel distant from the output facet, the active layer makes slanting contact with a rough diffusing surface formed by the current blocking layers and substrate. This easily-manufactured diffusing surface reduces optical gain within the active layer, thereby preventing lasing without requiring an antireflection coating.Type: GrantFiled: November 22, 1989Date of Patent: July 23, 1991Assignee: Oki Electric Industry Co., Ltd.Inventors: Yasumasa Kashima, Masao Kobayashi, Yoji Hosoi, Takashi Tsubota
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Patent number: 4975752Abstract: An LED includes a semiconductor substrate, a first blocking layer formed on this semiconductor substrate, a second blocking layer formed on this first blocking layer, a first V-channel extending from the second blocking layer to the semiconductor substrate, and a stripe-geometry light-emitting region formed in the first V-channel. Light is emitted from the LED from one edge of the light-emitting region due to a flow of current in the light-emitting region, to which the current is confined by the blocking layers. The LED also comprises a second V-channel disposed at a certain distance from the other edge of the light-emitting region, on the optical path of the light emitted from this other edge, and an absorbing region is formed in the second V-channel. This absorbing region absorbs the light emitted from the other edge of the light-emitting region. The LED has excellent characteristics in which a stable output of spontaneously-emitted light can be obtained under a wide variety of operating conditions.Type: GrantFiled: September 28, 1988Date of Patent: December 4, 1990Assignee: Oki Electric Industry Co., Ltd.Inventors: Yasumasa Kashima, Masao Kobayashi, Takashi Tsubota