Patents by Inventor Yasumasa Kosaka

Yasumasa Kosaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pad structure with parasitic MOS transistor for use with semiconductor devices
    Patent number: 5517048
    Abstract: An ESD protection device for protecting semiconductor devices from electrostatic discharge includes a metal pad of the semiconductor device, a first charge sink, and a first MOS transistor. The first MOS transistor is placed under the metal pad. The first MOS transistor is coupled as a switch between the first charge sink and the metal pad. In addition, the metal pad operates as a gate of the first MOS transistor. Upon static electricity of a high magnitude of voltage being placed on the metal pad, the first MOS transistor turns on and the static electricity is discharged to the first charge sink.
    Type: Grant
    Filed: July 23, 1993
    Date of Patent: May 14, 1996
    Assignee: VLSI Technology, Inc.
    Inventor: Yasumasa Kosaka