Patents by Inventor Yasunao Iwata

Yasunao Iwata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11460726
    Abstract: A liquid crystal display device includes: a display area; a non-display area; a plurality of gate lines; a plurality of source lines; a plurality of thin film transistors; a gate driver; a source driver; a control unit configured to supply a control signal to the source driver; and an auxiliary line extending in the non-display area from an end of one of the plurality of source lines to another end thereof, wherein each of the plurality of thin film transistors is turned on and off when one of the plurality of gate signals supplied to one of the plurality of gate lines connected to that thin film transistor changes to an ON voltage level and an OFF voltage level respectively, and the control signal rises at a different timing from a fall in one of the plurality of gate signals.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: October 4, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hiroto Akiyama, Yasunao Iwata
  • Publication number: 20210405412
    Abstract: A liquid crystal display device includes: a display area; a non-display area; a plurality of gate lines; a plurality of source lines; a plurality of thin film transistors; a gate driver; a source driver; a control unit configured to supply a control signal to the source driver; and an auxiliary line extending in the non-display area from an end of one of the plurality of source lines to another end thereof, wherein each of the plurality of thin film transistors is turned on and off when one of the plurality of gate signals supplied to one of the plurality of gate lines connected to that thin film transistor changes to an ON voltage level and an OFF voltage level respectively, and the control signal rises at a different timing from a fall in one of the plurality of gate signals.
    Type: Application
    Filed: June 18, 2021
    Publication date: December 30, 2021
    Inventors: HIROTO AKIYAMA, YASUNAO IWATA
  • Publication number: 20190302560
    Abstract: The present invention realizes a liquid crystal panel which can prevent its production yield from being reduced due to a line defect, and also to ensure a high pixel aperture ratio. The liquid crystal panel includes: a first substrate; a second substrate; and liquid crystal being provided between the first substrate and the second substrate. The first substrate has provided thereon the followings: a plurality of first wirings; a plurality of second wirings each intersecting the first wirings via a first interlayer insulating film; a plurality of switching elements each being provided near a corresponding one of intersections between the first wirings and the second wirings; a third wiring extending from a corresponding one of the switching elements to a pixel electrode; and a fourth wiring being provided in a layer different from a layer including the third wiring, so as to at least partially overlap the third wiring.
    Type: Application
    Filed: April 2, 2019
    Publication date: October 3, 2019
    Inventors: YASUNAO IWATA, JUNICHI MORINAGA
  • Patent number: 8432519
    Abstract: A pixel includes a plurality of first linear alignment regulating structures (22) provided on the liquid crystal layer side of a first substrate and a plurality of second linear alignment regulating structures (44) provided on the liquid crystal layer side of a second substrate. The first and second linear alignment regulating structures each have a first component (22a, 44a) extending along a first axis and a second component (22b, 44b) extending along a second axis which is different from the first axis, the second linear alignment regulating structures being linear dielectric protrusions. The liquid crystal display device further includes a connection dielectric protrusion (45a, 45b, 45c) for interconnecting two linear dielectric protrusions which belong to pixels adjoining each other and which are not collinear.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: April 30, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahiro Yoshida, Takahiro Sasaki, Yasunao Iwata
  • Publication number: 20120062827
    Abstract: A pixel includes a plurality of first linear alignment regulating structures (22) provided on the liquid crystal layer side of a first substrate and a plurality of second linear alignment regulating structures (44) provided on the liquid crystal layer side of a second substrate. The first and second linear alignment regulating structures each have a first component (22a, 44a) extending along a first axis and a second component (22b, 44b) extending along a second axis which is different from the first axis, the second linear alignment regulating structures being linear dielectric protrusions. The liquid crystal display device further includes a connection dielectric protrusion (45a, 45b, 45c) for interconnecting two linear dielectric protrusions which belong to pixels adjoining each other and which are not collinear.
    Type: Application
    Filed: May 24, 2010
    Publication date: March 15, 2012
    Inventors: Masahiro Yoshida, Takahiro Sasaki, Yasunao Iwata
  • Publication number: 20110298774
    Abstract: An LUT fixedly stores correction values to compensate for a pull-in voltage in pixels in a liquid crystal panel. In at least one example embodiment, the display control unit outputs an input video signal Xa, a video signal Xp of a previous frame read from a frame memory, and a pixel polarity indicating a polarity of a pixel applied voltage on the pixel basis, and outputs a correction value read from the LUT to a data line driving circuit as a video signal Xb after correction. The data line driving circuit performs alternate current driving, based on the video signal Xb after correction. The LUT stores different correction values between when a positive polarity voltage is applied and when a negative polarity voltage is applied, for at least a part of combinations of values of the input video signal Xa and the video signal Xp of the previous frame.
    Type: Application
    Filed: October 9, 2009
    Publication date: December 8, 2011
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Takaharu Yamada, Yasunao Iwata, Kuniko Maeno, Yasuhiro Mimura, Tomoo Furukawa, Hideki Morii, Tetsuya Fujikawa