Patents by Inventor Yasunao Mizutani

Yasunao Mizutani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240046061
    Abstract: An RFID tag includes a sheet-like substrate, an IC chip disposed on a first face of the substrate, a conductive adhesive that is positioned around the IC chip along the first face and fixes the IC chip to the substrate, an antenna pattern formed on a second face, of the substrate, that is opposite to the first face, and a through hole that penetrates the substrate toward the conductive adhesive around the IC chip and electrically connects the antenna pattern with the IC chip.
    Type: Application
    Filed: July 25, 2023
    Publication date: February 8, 2024
    Inventors: Akihiko SAITO, Yasunao MIZUTANI, Yoshiyasu SUGIMURA, Tsuyoshi NIWATA, Mimpei MIURA, Hideo MIYAZAWA, Mao KIKUKAWA
  • Patent number: 6724731
    Abstract: A radio communication system control method, a radio communication system, and an information processing apparatus used therein is one where system a server and terminals are linked via a plurality of base stations. The radio communication system is configured to prevent communication errors. When the link between a server and a base station is disconnected, the server detects the disconnection, and transmits, to a base station adjacent to the base station, a power supply off command for disconnecting the power supply in the base station. By transmitting the command to the base station via the base station, the server disconnects the power supply in the base station and stops the communication between the base station and a radio terminal apparatus.
    Type: Grant
    Filed: June 9, 1998
    Date of Patent: April 20, 2004
    Assignee: Fujitsu Limited
    Inventors: Tomoki Shibasaki, Yasunao Mizutani
  • Publication number: 20030105813
    Abstract: A client sends input information of an external device to a server to make a demand for processing, and receives output information from the server to output to the external device. The client initializes the I/O unit based on initialization information received from the server. The server sends initialization information of the external device upon reception of a demand for connection from the client, and, in connection, processes input information received from the client to send output information to the client. The server manages connection with the client, and when communication with the client ceases on the server, interrupts processing of the application processing unit to hold the status at interruption and the output information to the client. when communication with the client resumes, the server resends the initialization information to the client for initialization and resumes the processing of the application processing unit and the sending of the output information.
    Type: Application
    Filed: October 8, 2002
    Publication date: June 5, 2003
    Inventor: Yasunao Mizutani
  • Patent number: 5574737
    Abstract: A modulator-demodulator device includes a transmitter side having an error control coding circuit for adding redundancy to a bit sequence to be transmitted from a bit processing circuit and coding the bit sequence. A data sequence to coordinate transforming circuit transforms the bit sequence from the error control circuit into a signal point coordinate on a complex plane. A coordinate rotating circuit rotates the transformed signal point coordinates based on frame phase information from a frame phase generating circuit. In the receiver side, a coordinate rotating circuit applies rotation in a direction reverse that of the transmitter coordinate rotating circuit based on the frame phase information from the frame phase generating circuit. A second decision circuit decides the maximum likelihood signal point by utilizing the redundancy added by the error control coding circuit of the transmitter side and correcting the coordinate error of the received signal point.
    Type: Grant
    Filed: April 29, 1993
    Date of Patent: November 12, 1996
    Assignee: Fujitsu Limited
    Inventors: Yasunao Mizutani, Takashi Kaku
  • Patent number: 5572537
    Abstract: A modulator-demodulator device includes a transmitter side having an error control coding circuit for adding redundancy to a bit sequence to be transmitted from a bit processing circuit and coding the bit sequence. A data sequence to coordinate transforming circuit transforms the bit sequence from the error control circuit into a signal point coordinate on a complex plane. A coordinate rotating circuit rotates the transformed signal point coordinates based on frame phase information from a frame phase generating circuit. In the receiver side, a coordinate rotating circuit applies rotation in a direction reverse that of the transmitter coordinate rotating circuit based on the frame phase information from the frame phase generating circuit. A second decision circuit decides the maximum likelihood signal point by utilizing the redundancy added by the error control coding circuit of the transmitter side and correcting the coordinate error of the received signal point.
    Type: Grant
    Filed: April 29, 1993
    Date of Patent: November 5, 1996
    Assignee: Fujitsu Limited
    Inventors: Yasunao Mizutani, Takashi Kaku
  • Patent number: 5381415
    Abstract: A method of controlling a network including first and second terminals connected to the network. The method responds to a call collision state in which the first terminal transmits a corresponding connect request to the network for connection to the second terminal and, simultaneously, the second terminal transmits a corresponding connect request to the network for connection to the first terminal.
    Type: Grant
    Filed: July 8, 1993
    Date of Patent: January 10, 1995
    Assignee: Fujitsu Limited
    Inventor: Yasunao Mizutani
  • Patent number: 5319650
    Abstract: In a modulator-demodulator device, in the transmitter side an error control coding unit is provided for adding redundancy according to a predetermined procedure to a bit sequence to be transmitted from bit processing unit to code the bit sequence. A data sequence-to-coordinate transforming unit transforms the bit sequence from the error control coding unit into a coordinate of a signal point on a complex plane. A coordinate rotating unit rotates the transformed signal point coordinates based on the frame phase information from a frame phase generating unit. In the receiver side, a coordinate rotating unit applies the rotation in the reverse direction of that of the coordinate rotating unit of the transmitter side based on the frame phase information from the frame phase generating unit. A the second unit determines the maximum likelihood signal point by utilizing the redundancy added by the error control coding unit of the transmitter side and corrects the coordinate error of the received signal point.
    Type: Grant
    Filed: February 13, 1991
    Date of Patent: June 7, 1994
    Assignee: Fujitsu Limited
    Inventors: Yasunao Mizutani, Takashi Kaku