Patents by Inventor Yasunari Nosor

Yasunari Nosor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100080037
    Abstract: Provided is a nonvolatile semiconductor device capable of performing writing operations of different resistance changes for memory cells having variable resistive elements whose resistive characteristics are changed by voltage applications, individually and simultaneously. The device comprises: a load resistive characteristic variable circuit for each bit line connected commonly with the memory cells on the same column for selecting one of two load resistive characteristics according to a first writing operation where the resistive characteristics of the variable resistive element to be written transit from a low resistance state to a high resistance state or a second writing operation where they transit reversely; and a writing voltage pulse application circuit for applying a first voltage pulse in a first writing operation and a second voltage pulse in a second writing operation to the memory cells to be written through the load resistive characteristic variable circuits and the bit limes.
    Type: Application
    Filed: November 5, 2007
    Publication date: April 1, 2010
    Inventors: Kohji Inoue, Yasunari Nosor, Shigeo Ohnishi, Nobuyoshi Awaya