Abstract: An improved semiconductor memory device comprising memory cell areas including driving transistors having capacitors with increased capacitance. The driving transistors comprise a gate insulating film formed on a semiconductor substrate, a lower gate electrode formed on the gate insulating film, an upper gate electrode having a size smaller than the lower gate electrode and formed on the lower gate electrode, and an insulating film formed on the lower gate electrode so as to contact with a side wall of the upper gate electrode.

Abstract: A method for manufacturing a semiconductor device, comprising the steps of forming an oxide film selectively on the surface of a semiconductor substrate; forming a first polycrystalline silicon film on the whole surface and then forming a metallic silicide film on the surface of the first polycrystalline silicon film; patterning the first polycrystalline silicon film and the metallic silicide film except for the desired areas by a lithographic method; depositing polycrystalline silicon on the whole surface to thereby form a second polycrystalline silicon film and allow it to cover the patterned first polycrystalline silicon film and metallic silicide film; and performing oxidation in a state in which a boundary portion between the first polycrystalline silicon film and the metallic silicide film is not exposed to an oxidizing atmosphere by the presence of the second polycrystalline silicon film, to form an oxide film on the surface.

Abstract: To manufacture a semiconductor device, a buried layer, epitaxial layer and an element separating layer are formed on a substrate, in order; a first resist film is formed thereon and an opening at which a first base is to be formed in patterned in the epitaxial layer; a first base is formed by ion-injection with the first resist film as a mask; the first resist film is removed and an interlayer insulating film is formed; a second resist film is formed thereon and an opening at which a second base is to be formed is removed by etching; the bottom surface of the opening portion is oxidized to form a second base under the same opening due to reduction of impurity concentration; the oxide film is removed and a polysilicon film is formed; an emitter electrode is patterned; and an emitter layer is formed on the second base by ion injection and thermal diffusion. Since the first and second base can be formed in self-alignment condition, the element can be minimized without providing a mask matching margin.

Abstract: A method of manufacturing a bipolar transistor, and more particularly to a method of manufacturing a bipolar transistor with reduced base width W.sub.B by implanting intrinsic impurities such as Ge and Sn in the base region.

Abstract: A well with a low impurity concentration is provided as a collector region on a semiconductor substrate. A trench is formed in a portion of the well from the surface toward the inside thereof. An insulating film, serving as a barrier against impurities, is formed on the side wall of the trench. Impurities are introduced through the trench and diffused to a high concentration into the well, thereby forming a high impurity concentration collector region which is connected to the collector electrode of the bipolar transistor. With the above-mentioned structure, the steps of diffusing antimony to a high concentration and growing an epitaxial silicon layer, which are indispensable to the prior art, are eliminated.