Abstract: The invention concerns a wideband modulator using a PLL synthesizer, which can match the frequency characteristic and prevent degradation in modulation accuracy even in the presence of a variation in the manufacture of circuit components. In a wideband modulator which modulates the division ratio of a frequency divider by using a modulating signal generated by a modulating signal generator and outputs a modulated carrier signal from a VCO, calibration data from a calibration data generator are input via a selector. The amplitude value of an ac component of each modulating signal, either appearing on the output of a loop filter or demodulated by a demodulator, is converted to a digital value by way of an A/D converter. The difference between the two is detected and a control signal FCR to eliminate the difference is generated in order to correct the frequency characteristic of a PLL or a pre-distortion filter.

Abstract: An object of the invention is to provide wideband modulator using a PLL synthesizer which can match the frequency characteristic and prevent degradation in modulation accuracy even in the presence of a variation in the manufacture of circuit components. In a wideband modulator which modulates the division ratio of a frequency divider by using a modulating signal generated by a modulating signal generator and outputs a modulated carrier signal from a VCO, first and second calibration data from a calibration data generator are input via a selector. The amplitude value of an ac component of each modulating signal appearing on the output of a loop filter or the amplitude value of an ac component of each modulating signal demodulated by a demodulator is converted to a digital value by way of an AID converter.

Abstract: In a direction conversion receiver, a quadrature demodulator produces differential signals in a baseband on the basis of a local signal of a frequency synthesizer, with the differential signals being inputted through a first low pass filter, a gain control amplifier and an amplifier to a control unit and a direct current component between the differential signals being extracted in a second low pass filter. In addition, an offset compensating section reduces an offset voltage while the control unit outputs a control signal for the control of the gain control amplifier. The second low pass filter includes a time constant circuit for determining a time constant through the use of resistors and a capacitor, and a time constant changing section. A time constant control unit controls the time constant changing section for a predetermined period of time after the control unit outputs data for the change of a frequency of the local signal so that the time constant of the time constant circuit decreases.

Abstract: A frequency synthesizer device comprising a PLL circuit (9) and a frequency-division ratio control circuit (5). The PLL circuit (9) includes a phase comparator (1), a low-pass filter (2), a voltage-controlled oscillator (3), and a variable frequency divider (4). The frequency-division ratio control circuit (5) controls the variable frequency divider (4) such that a frequency division ratio of the variable frequency divider (4) is changed in time and a time average value of the frequency division ratio contains a value below a decimal point. Two different signals of an output signal fdiv of the variable frequency divider (4) and an output fdiv2 obtained via a delay element (10) are used as clocks of an accumulator portion (81) in the frequency-division ratio control circuit (5).

Abstract: In a direction conversion receiver, a quadrature demodulator produces differential signals in a baseband on the basis of a local signal of a frequency synthesizer, with the differential signals being inputted through a first low pass filter, a gain control amplifier and an amplifier to a control unit and a direct current component between the differential signals being extracted in a second low pass filter. In addition, an offset compensating section reduces an offset voltage while the control unit outputs a control signal for the control of the gain control amplifier. The second low pass filter includes a time constant circuit for determining a time constant through the use of resistors and a capacitor, and a time constant changing section. A time constant control unit controls the time constant changing section for a predetermined period of time after the control unit outputs data for the change of a frequency of the local signal so that the time constant of the time constant circuit decreases.

Abstract: A frequency synthesizer is provided with a prescaler 2 and a counter 3, which output a signal having a frequency generated by frequency-dividing an output signal of a VCO 1; a reference frequency divider 5 for frequency-dividing a frequency of a reference signal of a reference signal source 4; a frequency adjusting meas 9 operated in such that a frequency error between the output signal of the counter 5 and the output signal of the reference frequency divider 5 is detected, and in response to this detection result, such a signal is outputted by which either a capacitor value or an inductor value employed in a resonant circuit of the VCO 1 is switched; and also a bias control means for applying an arbitrary voltage V1 to a control voltage terminal of the VCO 1 so as to bring an output signal of a charge pump 7 into a high impedance state when the frequency adjusting means 9 is operated.

Abstract: In a frequency synthesizer, a voltage controlled oscillator has a terminal and oscillates a signal whose frequency corresponds to a control signal applied to the terminal. A first frequency divider divides the frequency of the signal outputted from the voltage controlled oscillator so as to output a first frequency-divided signal. The first frequency-divided signal has a divided frequency. A comparator compares a phase of the first frequency-divided signal with that of a reference signal so as to output a difference signal representing a difference between the phase of the first frequency-divided signal and that of the reference signal. A loop filter smoothes the difference signal outputted from the comparator so as to output the smoothed signal as the control signal to the terminal of the voltage controlled oscillator. A frequency division unit divides the frequency of the signal outputted from the voltage control oscillator so as to output a second frequency-divided signal.

Abstract: A frequency synthesizer is provided with a prescaler 2 and a counter 3, which output a signal having a frequency generated by frequency-dividing an output signal of a VCO 1; a reference frequency divider 5 for frequency-dividing a frequency of a reference signal of a reference signal source 4; a frequency adjusting meas 9 operated in such that a frequency error between the output signal of the counter 5 and the output signal of the reference frequency divider 5 is detected, and in response to this detection result, such a signal is outputted by which either a capacitor value or an inductor value employed in a resonant circuit of the VCO 1 is switched; and also a bias control means for applying an arbitrary voltage V1 to a control voltage terminal of the VCO 1 so as to bring an output signal of a charge pump 7 into a high impedance state when the frequency adjusting means 9 is operated.

Abstract: A frequency synthesizer device comprising a PLL circuit (9) and a frequency-division ratio control circuit (5). The PLL circuit (9) includes a phase comparator (1), a low-pass filter (2), a voltage-controlled oscillator (3), and a variable frequency divider (4). The frequency-division ratio control circuit (5) controls the variable frequency divider (4) such that a frequency division ratio of the variable frequency divider (4) is changed in time and a time average value of the frequency division ratio contains a value below a decimal point. Two different signals of an output signal fdiv of the variable frequency divider (4) and an output fdiv2 obtained via a delay element (10) are used as clocks of an accumulator portion (81) in the frequency-division ratio control circuit (5).

Abstract: The present invention discloses a single-ended signals to differential signals converter. In this invention, a first circuit comprising a transistor outputting single-ended signals and a first spiral inductor connected as an inductor for load use that contributes in determining frequency characteristics of a first circuit to either one of output terminals of higher voltage side and lower voltage side of the transistor, and a second circuit comprising a pair of differential input terminals for inputting differential signals and a second spiral inductor that is magnetically coupled with the first spiral inductor, and both ends thereof are connected to the differential input terminals, respectively, are formed within a monolithic integrated circuit.

Abstract: A broadcasting system discriminating television receiver including a circuit for evaluating the output of an FM demodulator, a circuit for evaluating the output of an I/Q wave detector, and a controller for controlling a switch based on the results of each evaluation. The switch is used primarily to determine whether the output of the receiver is analog or digital.

Abstract: A television receiver having an input section for splitting a reception signal to a first signal and a second signal, first and second mixers for respectively receiving the split reception signals, a local oscillator for outputting first and second local oscillation signals, a 90.degree. phase shifter for providing the first local oscillation signal to another input of the first mixer after phase-shifting by 90.degree., a first output section for directly extracting outputs from the first and the second mixers, and a second output section for outputting a second output obtained by adding a direct output from the first mixer and the output from the second mixer which has passed through another 90.degree. phase shifter.

Abstract: A broadcasting system discriminating television receiver includes a circuit which applies the FM demodulation discrimination on the output of the FM demodulator in an analog broadcasting, or a circuit which applies a video signal discrimination on a video output which is connected to a circuit which applies an I/Q wave detection on the output of an I/Q detector or a circuit which applies a video signal discrimination on a video output, and means for controlling a signal selector switch (SW) after the channel selector judging from the result of the discriminator.

Abstract: An automatic gain control (AGC) detection circuit. The AGC detection circuit includes; a current source, first to fourth transistors whose emitters are connected in common to the current source, a reference voltage source for supplying the bases of the first and the second transistors with a reference voltage, input terminal means connected to the bases of the third and the fourth transistors for receiving an input signal, a power supply source for supplying the first to fourth transistors with a power supply voltage, first collector load means connected between the power supply source and a node connecting the collectors of the first and second transistors in common, second collector load means connected between the power supply source and another node connecting the collectors of the third and fourth transistors in common, and an output terminal means connected between the nodes for taking out an automatic gain control detection output.