Abstract: A diagnosis device determines diagnoses one of primary and secondary board temperature sensors as abnormal, in response to a condition that a state in which a primary temperature sensor value and a secondary temperature sensor value deviate from each other by a predetermined value or more continues for a predetermined duration or more; performs torque limitation to limit a torque inputted from an engine to an automatic transmission, during driving in a predetermined travel section based on a predetermined condition, after the one of the primary and secondary board temperature sensors is diagnosed as abnormal; and performs transmission shift restriction to restrict shifting of the automatic transmission along with the torque limitation, in response to a condition that the one of the primary and secondary board temperature sensors continues to be diagnosed as still abnormal after the driving in the predetermined travel section is completed.

Abstract: Nanosheets 21 to 23 are formed in line in this order in the X direction, and nanosheets 24 to 26 are formed in line in this order in the X direction. In a buried interconnect layer, a power line 11 is formed between the nanosheets 22 and 25 as viewed in plan. A face of the nanosheet 22 on a first side as one of the sides in the X direction is exposed from a gate interconnect 32. A face of the nanosheet 25 on a second side as the other side in the X direction is exposed from a gate interconnect 35.

Abstract: A diagnosis device determines diagnoses one of primary and secondary board temperature sensors as abnormal, in response to a condition that a state in which a primary temperature sensor value and a secondary temperature sensor value deviate from each other by a predetermined value or more continues for a predetermined duration or more; performs torque limitation to limit a torque inputted from an engine to an automatic transmission, during driving in a predetermined travel section based on a predetermined condition, after the one of the primary and secondary board temperature sensors is diagnosed as abnormal; and performs transmission shift restriction to restrict shifting of the automatic transmission along with the torque limitation, in response to a condition that the one of the primary and secondary board temperature sensors continues to be diagnosed as still abnormal after the driving in the predetermined travel section is completed.

Abstract: A semiconductor device that performs refresh tests of a plurality of individual memories built into the same chip and prevents excessive testing during the refresh test. When a first testing circuit enters a wait state, the first testing circuit issues a refresh command REF to a first memory circuit. Then, the first memory circuit refreshes the memory cells until a second testing circuit enters the wait state. That is, since the memory cells of the first memory circuit are refreshed until the writing to a second memory circuit ends, the refresh test time of the first and second memory circuits are the same.

Abstract: A semiconductor device that performs refresh tests of a plurality of individual memories built into the same chip and prevents excessive testing during the refresh test. When a first testing circuit enters a wait state, the first testing circuit issues a refresh command REF to a first memory circuit. Then, the first memory circuit refreshes the memory cells until a second testing circuit enters the wait state. That is, since the memory cells of the first memory circuit are refreshed until the writing to a second memory circuit ends, the refresh test time of the first and second memory circuits are the same.

Abstract: An input protection circuit includes a conductor pattern extending from a first end connected to an input pad to a second end connected to an integrated circuit, first and second, mutually separated ground patterns disposed at both sides of the conductor pattern with a separation therefrom, a first gate pattern provided on a gap between the conductor pattern and the first ground pattern, and a second gate pattern provided on a gap between the conductor pattern and the second ground pattern, wherein the conductor pattern, the first ground pattern and the first gate pattern form a first transistor extending continuously from the first end to the second end of the conductor pattern at a first side of the conductor pattern, and wherein the conductor pattern, the second ground pattern and the second gate pattern form a second transistor extending continuously from the first end to the second end of the conductor pattern at a second side of the conductor pattern.