Patents by Inventor Yasunori Nonaka

Yasunori Nonaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170256605
    Abstract: A method for fabricating an electronic device is provided, and the method comprises the steps of: forming a lower electrode on a substrate; forming a dielectric film on the lower electrode; forming an upper electrode on the dielectric film, the upper electrode including gold (Au); forming a refractory metal layer on at least one of upper or lower surface of the upper electrode, the refractory metal layer having a melting temperature higher than a melting temperature of the upper electrode; forming an insulating film to cover the lower electrode, the dielectric film, the upper electrode, and the refractory metal layer; and dry-etching the insulating film to form an opening therein, the upper electrode or the refractory metal layer being exposed at the opening.
    Type: Application
    Filed: May 19, 2017
    Publication date: September 7, 2017
    Inventor: Yasunori Nonaka
  • Publication number: 20150200243
    Abstract: A method for fabricating an electronic device is provided, and the method comprises the steps of: forming a lower electrode on a substrate; forming a dielectric film on the lower electrode; forming an upper electrode on the dielectric film, the upper electrode including gold (Au); forming a refractory metal layer on at least one of upper or lower surface of the upper electrode, the refractory metal layer having a melting temperature higher than a melting temperature of the upper electrode; forming an insulating film to cover the lower electrode, the dielectric film, the upper electrode, and the refractory metal layer; and dry-etching the insulating film to form an opening therein, the upper electrode or the refractory metal layer being exposed at the opening.
    Type: Application
    Filed: January 13, 2015
    Publication date: July 16, 2015
    Inventor: Yasunori NONAKA
  • Publication number: 20020022343
    Abstract: There are contained the steps of forming a plurality of semiconductor elements on surface sides of a plurality of operational unit areas defined on a semiconductor substrate respectively, then connecting the semiconductor elements only in the operational unit areas by wirings, and then forming recesses from the back side of the semiconductor substrate in the situation that a connection layer for connecting mechanically the semiconductor elements only in the operational unit areas is formed on the surface side of the semiconductor substrate, whereby the semiconductor substrate is separated between the semiconductor elements. Accordingly, there is provided a method of manufacturing a semiconductor device having a plurality of semiconductor elements, that is capable of preventing electrical interference between a plurality of semiconductor elements that are connected mutually via wirings and also suppressing variation a width of a recess that separates respective semiconductor elements.
    Type: Application
    Filed: August 13, 2001
    Publication date: February 21, 2002
    Applicant: Fujitsu Quantum Devices Limited
    Inventor: Yasunori Nonaka