Patents by Inventor Yasunori Ohkubo
Yasunori Ohkubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 6846723Abstract: A process of production of a semiconductor substrate having a semiconductor layer on an insulating film formed on a substrate. The process comprises the steps of forming a groove of a predetermined depth having a predetermined pattern in a first substrate made of a semiconductor, forming a first insulating film in the groove and above the first substrate, doping an impurity for peeling off the first substrate into a region of a predetermined depth of the first substrate, bonding a second substrate from above the first insulating film, removing the first substrate in the region with the impurity doped therein by heat treatment while leaving the semiconductor layer of the surface layer of the first substrate on the first insulating film, and polishing the semiconductor layer using as a stopper the surface of the first insulating film shaped projecting out at a bottom of the groove.Type: GrantFiled: May 5, 2003Date of Patent: January 25, 2005Assignee: Sony CorporationInventor: Yasunori Ohkubo
-
Publication number: 20040007739Abstract: A semiconductor substrate, for forming a circuit pattern of a semiconductor chip, comprised of a substrate, an insulating film formed on the substrate, and a semiconductor layer formed on the insulating film, wherein the semiconductor layer is isolated by the insulating film for every region formed with a circuit pattern of a semiconductor chip, able to be generally used even if a silicon on insulator or semiconductor on insulator (SOI) layer is isolated by an insulating film, and a process of production of an SOI substrate, enabling a reduction of thickness of the SOI layer and able to suppress the manufacturing costs and variation in the thickness of the SOI layer, comprising forming a groove in a first substrate made of a semiconductor, forming a first insulating film in the groove and on the first substrate, injecting hydrogen ions to form a peeling layer, bonding a second substrate, peeling off the first substrate by heat treatment while leaving the semiconductor layer, and polishing the semiconductor laType: ApplicationFiled: May 5, 2003Publication date: January 15, 2004Inventor: Yasunori Ohkubo
-
Patent number: 6580128Abstract: A semiconductor substrate, for forming a circuit pattern of a semiconductor chip, comprised of a substrate, an insulating film formed on the substrate, and a semiconductor layer formed on the insulating film, wherein the semiconductor layer is isolated by the insulating film for every region formed with a circuit pattern of a semiconductor chip, able to be generally used even if a silicon on insulator or semiconductor on insulator (SOI) layer is isolated by an insulating film, and a process of production of an SOI substrate, enabling a reduction of thickness of the SOI layer and able to suppress the manufacturing costs and variation in the thickness of the SOI layer, comprising forming a groove in a first substrate made of a semiconductor, forming a first insulating film in the groove and on the first substrate, injecting hydrogen ions to form a peeling layer, bonding a second substrate, peeling off the first substrate by heat treatment while leaving the semiconductor layer, and polishing the semiconductor laType: GrantFiled: January 8, 2001Date of Patent: June 17, 2003Assignee: Sony CorporationInventor: Yasunori Ohkubo
-
Patent number: 6503811Abstract: A method for fabricating a substrate having a semiconductor layer lowing thinning of the semiconductor layer while ensuring accuracy its thickness and a small surface roughness is provided. First, provided a patterning step in which a semiconductor substrate 1 formed on an insulating layer 4 having recesses 7 is polished to leave the semiconductor substrate 1 only in the recesses 7, and specifically, the semiconductor substrate 1 is chemically polished using the insulating layer 4 as a mask; next, provided is an etching step in which the insulating layer 4 is etched using the residual semiconductor substrate 1 as an etching mask to reduce the depth of the recesses 7; and further provided is a thinning step in which the semiconductor substrate 1 is polished, specifically by the chemical mechanical polishing, while ensuring a selectivity over the insulating layer 4 to reduce the thickness of the semiconductor substrate 1.Type: GrantFiled: June 7, 2000Date of Patent: January 7, 2003Assignee: Sony CorporationInventor: Yasunori Ohkubo
-
Publication number: 20010007367Abstract: A semiconductor substrate, for forming a circuit pattern of a semiconductor chip, comprised of a substrate, an insulating film formed on the substrate, and a semiconductor layer formed on the insulating film, wherein the semiconductor layer is isolated by the insulating film for every region formed with a circuit pattern of a semiconductor chip, able to be generally used even if a silicon on insulator or semiconductor on insulator (SOI) layer is isolated by an insulating film, and a process of production of an SOI substrate, enabling a reduction of thickness of the SOI layer and able to suppress the manufacturing costs and variation in the thickness of the SOI layer, comprising forming a groove in a first substrate made of a semiconductor, forming a first insulating film in the groove and on the first substrate, injecting hydrogen ions to form a peeling layer, bonding a second substrate, peeling off the first substrate by heat treatment while leaving the semiconductor layer, and polishing the semiconductor laType: ApplicationFiled: January 8, 2001Publication date: July 12, 2001Inventor: Yasunori Ohkubo
-
Patent number: 6169000Abstract: A process for the production of a semiconductor substrate having a silicon-on-insulator structure comprising the steps of; (A) ion-implanting a semiconductor substrate to form a buried polishing-stop layer inside the semiconductor substrate, (B) patterning a portion of the semiconductor substrate above the buried polishing-stop layer to form a trench portion which reaches the buried polishing-stop layer, thereby forming a semiconductor layer on the buried polishing-stop layer, (C) forming an insulating layer on the semiconductor layer and the buried polishing-stop layer, (D) bonding the semiconductor substrate and a supporting substrate to each other through the insulating layer, (E) grinding and polishing the semiconductor substrate from its rear surface to expose the buried polishing-stop layer, and (F) removing the buried polishing-stop layer to expose the semiconductor layer, in which the semiconductor layer has a thickness of 2×10−8 m to 1×10−7 m and the buried polishing-stop layeType: GrantFiled: September 23, 1999Date of Patent: January 2, 2001Assignee: Sony CorporationInventor: Yasunori Ohkubo
-
Patent number: 6032715Abstract: A wafer bonding device which prevents the substrate from being deformed due to the presence of any particles on the chuck surface is provided to thereby prevent a deterioration in yield in the wafer bonding process. The wafer bonding device is equipped with a substrate holding section 3 having a chuck surface 9 for holding a substrate 1, which is one of two substrates 1 and 2 to be bonded together, and the other substrate 2 is bonded to the substrate 1, which is held by the chuck surface 9, wherein a suction member 8 engaged with a support member 4, forming the substrate holding section 3, is formed of a porous material, whereby minute recesses of a predetermined size are formed in high density on the chuck surface 9 of the substrate holding section 3, and any particles are captured in these minute recesses.Type: GrantFiled: June 26, 1997Date of Patent: March 7, 2000Assignee: Sony CorporationInventors: Yasunori Ohkubo, Hiroshi Satoh, Yoshihiro Miyazawa
-
Patent number: 5769991Abstract: A method of wafer bonding with less elongation and contraction of wafers at the time of and after the bonding of the wafers is disclosed. In the method of wafer bonding, wafers are bonded together with sticking force of their surfaces to form a bonded wafer. The bonding is done by selecting the pressure of the gas between the wafers to be lower than the atmospheric pressure, for instance, and also selecting the kind of gas between the wafers to H.sub.2, for instance.Type: GrantFiled: February 23, 1994Date of Patent: June 23, 1998Assignee: Sony CorporationInventors: Yoshihiro Miyazawa, Yasunori Ohkubo
-
Patent number: 4849065Abstract: A crystal growing method for growing a crystal from a raw material melt highly magnetic field is being applied to the raw material melt, the electromagnet for applying the magnetic field being supplied with a direct current having a ripple factor of less than 5% to thereby grow a crystal with good crystallinity properties.Type: GrantFiled: September 25, 1987Date of Patent: July 18, 1989Assignee: Sony CorporationInventors: Yasunori Ohkubo, Toshihiko Suzuki, Nobuyuki Izawa
-
Patent number: 4622211Abstract: An apparatus for solidification comprising a container for a liquid material which is to be solidified and an electric heater around the container and energized to melt the liquid material, a pair of magnets beside the container producing a stationary magnetic field, a source of electricity to supply substantially DC current to said heater and means for pulling a solid crystal from said liquid material.Type: GrantFiled: December 16, 1983Date of Patent: November 11, 1986Assignee: Sony CorporationInventors: Toshihiko Suzuki, Nobuyuki Isawa, Yasunori Ohkubo, Kinji Hoshi
-
Patent number: 4619730Abstract: A process for solidification of fluid such as silicon melt and so on is disclosed. In this case, liquid material having electrical conductivity is in a container and a unidirectional stationary magnetic field is applied to the liquid material. Thus, the dissolution of at least one elemental material of the container into the liquid material is conducted by diffusion thereof.Type: GrantFiled: January 13, 1982Date of Patent: October 28, 1986Assignee: Sony CorporationInventors: Toshihiko Suzuki, Nobuyuki Isawa, Yasunori Ohkubo, Kinji Hoshi