Patents by Inventor Yasuo Isono

Yasuo Isono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6796299
    Abstract: A grounding electrode 20 is electrically grounds, and a center electrode 10 to which high voltage pulse is applied that an end of the grounding electrode 20 and an end of the center electrode 10 are disposed closely. The grounding electrode 20 is branched into a main grounding electrode 21 and an auxiliary grounding electrode 30. An end 25 of the main grounding electrode 21 and an end 36 of the auxiliary grounding electrode 30 are disposed close to an end 11 of the center electrode. An inductor section 32 that counterelectromotive force is generated according to a variation amount of flowing current is integrally provided between a portion of the auxiliary grounding electrode 30 branched from the grounding electrode 20 and the end 36 of the auxiliary grounding electrode 30.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: September 28, 2004
    Inventor: Yasuo Isono
  • Publication number: 20040112351
    Abstract: A grounding electrode 20 is electrically grounds, and a center electrode 10 to which high voltage pulse is applied that an end of the grounding electrode 20 and an end of the center electrode 10 are disposed closely. The grounding electrode 20 is branched into a main grounding electrode 21 and an auxiliary grounding electrode 30. An end 25 of the main grounding electrode 21 and an end 36 of the auxiliary grounding electrode 30 are disposed close to an end 11 of the center electrode. An inductor section 32 that counterelectromotive force is generated according to a variation amount of flowing current is integrally provided between a portion of the auxiliary grounding electrode 30 branched from the grounding electrode 20 and the end 36 of the auxiliary grounding electrode 30.
    Type: Application
    Filed: October 23, 2003
    Publication date: June 17, 2004
    Inventor: Yasuo Isono
  • Patent number: 5341325
    Abstract: A plurality of memory cells are constituted by a large number of belt-like first conductive members, a ferroelectric thin film formed on the first conductive members, and a large number of belt-like second conductive members formed on the film in a direction perpendicular to the first conductive members. A reading/writing section performs a reading/writing operation with respect to each memory cell after applying a predetermined voltage to at least memory cells other than a target memory cell to cause ferroelectric polarization corresponding to crosstalk components. A two-terminal switch integrally stacked on each of the memory cells serves to reduce dielectric polarization for the elimination of crosstalk caused in each memory cell.
    Type: Grant
    Filed: November 5, 1992
    Date of Patent: August 23, 1994
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Hiroshi Nakano, Yasuo Isono
  • Patent number: 5329485
    Abstract: According to this invention, there is provided a memory element and a matrix memory cell array including memory cells each having a nonlinear conductivity bipolar switching element constituted by a multi-layered structure which performs writing/reading operations of a polarization state of a ferroelectric body, i.e., a recording medium of the memory cell, as data and which is constituted by an insulating layer of a predetermined-thickness Langmuir-Blodgett film using most of a switching drive current as a direct tunnel current and conductive layers formed on both the surfaces of the insulating layer.
    Type: Grant
    Filed: October 29, 1991
    Date of Patent: July 12, 1994
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Yasuo Isono, Masamichi Morimoto, Hiroshi Nakano
  • Patent number: 5289408
    Abstract: A scanning tunneling microscope memory apparatus comprises first and second integrated circuit (IC) substrates. First and second cantilevers, which can be moved by piezoelectric elements, are arranged on the first and second IC substrates, respectively. Tunnel current probes are provided on a free end of the first cantilever, and a recording element is provided on a free end of the second cantilever. The first and second cantilevers are spaced from each other and overlap such that the tunnel current probes face the recording element. The first or second substrate includes a charge coupled device (CCD) circuit, a control circuit for controlling the CCD circuit and cantilevers, and a drive circuit having a preamplifier, a write circuit, and a servo circuit.
    Type: Grant
    Filed: April 23, 1992
    Date of Patent: February 22, 1994
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Yoshiyuki Mimura, Hiroshi Kajimura, Toshihito Kouchi, Akitoshi Toda, Yasuo Isono, Hiroko Ohta, Ryouhei Shimizu
  • Patent number: 5220202
    Abstract: A memory device includes a nonlinear electric conductivity element, a charge accumulation element, and a switching element. The nonlinear electric conductivity element has an insulating layer having opposite surfaces, and first and second conductive layers respectively formed on the opposite surfaces of the insulating layer. The nonlinear electric conductivity element receives an external write signal applied to one of the first and second conductive layers, and outputs a signal having nonlinear electric conductivity characteristics from the other of the first and second conductive layers. The charge accumulation element has charge accumulation characteristics and is connected to receive and store the signal output from the other of the first and second conductive layers. The switching element is ON/OFF-controlled upon reception of the signal charge stored in the charge accumulation element.
    Type: Grant
    Filed: February 6, 1991
    Date of Patent: June 15, 1993
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Yasuo Isono, Hiroshi Nakano
  • Patent number: 5216254
    Abstract: An apparatus for forming a predetermined circuit pattern on a circuit substrate by using a .mu.-STM write head, the .mu.-STM write head comprising a write head substrate having a flat surface, a plurality of micro chip electrodes formed upright on the flat surface of the write head substrate and constituting a .mu.-STM, a level of a distal end of each of the chip electrodes being set to be constant, and scanning means for scanning the micro chip electrodes on the circuit substrate by moving the micro chip electrodes and the circuit substrate relative to each other in two-dimensional directions.
    Type: Grant
    Filed: May 1, 1990
    Date of Patent: June 1, 1993
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Hiroko Ohta, Ryouhei Shimizu, Toshihito Kouchi, Akitoshi Toda, Yasuo Isono, Yoshiyuki Mimura, Hiroshi Kajimura
  • Patent number: 5144581
    Abstract: A micro scanning tunneling microscope ("STM") arithmetic circuit device comprises an information-rewritable micro STM recording medium and a micro STM recording apparatus which temporarily stores information on the recording medium such that the information can be read as a variation in a tunnel current. The recording apparatus has a probe (probes) for writing/reading information on the recording medium and a scanner for varying a relationship in position between the probe and the recording medium. The micro STM recording apparatus uses a recording medium having a specific format as the micro STM recording medium in which recorded information is read as a variation in a tunnel current. That is, the recording medium has an address area in which address information is recorded and a data area in which data information is recorded.
    Type: Grant
    Filed: January 29, 1990
    Date of Patent: September 1, 1992
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Akitoshi Toda, Ryouhei Shimizu, Hiroko Ohta, Hiroshi Kajimura, Yoshiyuki Mimura, Yasuo Isono, Toshihito Kouchi
  • Patent number: 5091880
    Abstract: A memory device comprises a base plate with a memory element supporting layer, a probe with a pointed tip portion, and a fine scan element for causing the probe to scan over the surface of the memory element supporting layer. When the probe is approached to the surface of the memory element supporting layer and a suitable bias voltage is applied across the probe and the memory element supporting layer, a tunnel current is cause to flow therebetween and a specific region of the surface of the supporting layer is excited. The excited region can adsorb one molecule of, for example, di-(2-ethylhexyl)phthalate. By causing the memory element to be adsorbed selectively on the memory element supporting layer, data is recorded in the form of a projection-and-recess pattern. The recorded data can be read out by observing the surface configuration of the supporting layer in accordance with the principle of an STM (scanning tunneling microscope).
    Type: Grant
    Filed: January 29, 1990
    Date of Patent: February 25, 1992
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Yasuo Isono, Toshihito Kouchi, Akitoshi Toda, Hiroshi Kajimura, Yoshiyuki Mimura, Hiroko Ohta, Ryouhei Shimizu
  • Patent number: 5053995
    Abstract: A data storage apparatus includes a first lever body having a piezoelectric driving section, and a second lever body which is disposed to separate from and to be perpendicular to the first lever body, and has a piezoelectric driving section. A recording medium is formed on a portion of the second lever body, and records desired data. A plurality of probes are disposed on a portion of the first lever body to oppose the recording medium at a predetermined interval, and detect a change in state at predetermined positions on the recording medium as a change in tunnel current or a change in three-dimensional pattern. A voltage applying circuit alternately applies predetermined voltages to the piezoelectric driving sections of the first and second lever bodies to separately drive the plurality of probes in different directions, thereby three-dimensionally scanning the recording medium.
    Type: Grant
    Filed: January 23, 1990
    Date of Patent: October 1, 1991
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Hiroshi Kajimura, Toshihito Kouchi, Akitoshi Toda, Yasuo Isono, Yoshiyuki Mimura, Hiroko Ohta, Ryouhei Shimizu
  • Patent number: 4972370
    Abstract: A three-dimensional memory element comprises a multilayer tunnel switch portion formed by alternately stacking conductive films and insulating films, both the ends of the switch portion consisting of insulating films, a write electrode formed on the insulating film as one end of the multilayer tunnel switch portion, a read electrode formed on the insulating film as the other end of the multilayer tunnel switch portion, and charge accumulating capacitors respectively connected to the conductive films of the multilayer tunnel switch portion.
    Type: Grant
    Filed: August 24, 1989
    Date of Patent: November 20, 1990
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Masamichi Morimoto, Yoshiyuki Mimura, Yasuo Isono
  • Patent number: 4777099
    Abstract: A thin-film electroluminescence device comprises a plate-like transparent electrode formed on a transparent substrate. A first insulating layer is formed on the transparent electrode. A second insulating layer is mounted on an electroluminescent layer made of ZnS:Mn and formed on the first insulating layer. A plate-like back electrode is provided on the second insulating layer. The first and second insulating layers are each made of gadolinium oxide of a purity level of over 99.9% and have a thickness of 0.05 to 0.8 .mu.m.
    Type: Grant
    Filed: September 30, 1987
    Date of Patent: October 11, 1988
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Yoshiyuji Mimura, Yasuo Isono
  • Patent number: 4743800
    Abstract: An array of light emitting elements comprises an insulating substrate, a dot anode array including a multitude of dot anodes defined by conductors and phosphors formed on the substrate, a thermionic emission cathode disposed in opposing relationship with the dot anode array, and a grid interposed between the cathode and the dot anode array. An accelerating electric field is selectively established between the dot anodes and the cathode to excite the phosphors on the dot anodes with low speed electron beams, thus causing the phosphors to emit light. The array is primarily used in an electrophotographic printer.
    Type: Grant
    Filed: January 22, 1986
    Date of Patent: May 10, 1988
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Yoshiyuki Mimura, Akitoshi Toda, Yasuo Isono
  • Patent number: 4701042
    Abstract: A duplicating apparatus including a charge retentive drum arranged rotatably, an electrostatic latent image forming device, a non-contact type developing device, a transferring device for transferring a toner image onto a record paper and a fixing device for fixing the toner image onto the record paper. A correction electrode is provided between the developing device and transferring device and an AC bias voltage is applied to the correction electrode to generate a vibrating electric field. Image quality of the duplicated copies can be improved by passing the toner image through the vibrating electric field.
    Type: Grant
    Filed: December 2, 1985
    Date of Patent: October 20, 1987
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Yoshiyuki Mimura, Yasuo Isono