Patents by Inventor Yasuo Matsuoka
Yasuo Matsuoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10131135Abstract: An imprint apparatus according to one embodiment includes a contact processing unit and a defect determination unit. The contact processing unit brings a template pattern formed on a front surface of a template into contact with resist placed on a substrate. The defect determination unit determines a defect in an imprint process, on the basis of force which is generated from at least one of the template, the resist, and the substrate, during the imprint process.Type: GrantFiled: March 3, 2016Date of Patent: November 20, 2018Assignee: Toshiba Memory CorporationInventors: Yasuo Matsuoka, Hiroshi Nomura, Masahito Hiroshima
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Publication number: 20170021607Abstract: An imprint apparatus according to one embodiment includes a contact processing unit and a defect determination unit. The contact processing unit brings a template pattern formed on a front surface of a template into contact with resist placed on a substrate. The defect determination unit determines a defect in an imprint process, on the basis of force which is generated from at least one of the template, the resist, and the substrate, during the imprint process.Type: ApplicationFiled: March 3, 2016Publication date: January 26, 2017Inventors: Yasuo MATSUOKA, Hiroshi NOMURA, Masahito HIROSHIMA
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Patent number: 9501739Abstract: According to one embodiment, a neuron learning type integrated circuit device includes neuron cell units. Each of the neuron cell units includes synapse circuit units, and a soma circuit unit connected to the synapse circuit units. Each of the synapse circuit units includes a first transistor including a first terminal, a second terminal, and a first control terminal, a second transistor including a third terminal, a fourth terminal, and a second control terminal, a first condenser, one end of the first condenser being connected between the second and third terminals, and a control line connected to the first and second control terminals. The soma circuit unit includes a Zener diode including an input terminal and an output terminal, the input terminal being connected to the fourth terminal, and a second condenser, one end of the second condenser being connected between the fourth terminal and the input terminal.Type: GrantFiled: March 11, 2014Date of Patent: November 22, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Yasuo Matsuoka, Hiroshi Nomura
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Patent number: 9398885Abstract: The problem addressed by the invention is to always keep an imaging angle of an X-ray detector to an object constant before and after an imaging unit is moved. In order to solve the problem, a mobile X-ray diagnostic apparatus related to the present invention detects a rotation amount of a main body in a horizontal surface due to movement on a floor surface and controls rotation drive of the X-ray detector based on a detection result.Type: GrantFiled: September 24, 2012Date of Patent: July 26, 2016Assignee: Hitachi, Ltd.Inventors: Koichiro Suzuki, Takahiro Yurugi, Yasuo Matsuoka
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Publication number: 20150120629Abstract: According to one embodiment, a neuron learning type integrated circuit device includes neuron cell units. Each of the neuron cell units includes synapse circuit units, and a soma circuit unit connected to the synapse circuit units. Each of the synapse circuit units includes a first transistor including a first terminal, a second terminal, and a first control terminal, a second transistor including a third terminal, a fourth terminal, and a second control terminal, a first condenser, one end of the first condenser being connected between the second and third terminals, and a control line connected to the first and second control terminals. The soma circuit unit includes a Zener diode including an input terminal and an output terminal, the input terminal being connected to the fourth terminal, and a second condenser, one end of the second condenser being connected between the fourth terminal and the input terminal.Type: ApplicationFiled: March 11, 2014Publication date: April 30, 2015Inventors: Yasuo MATSUOKA, Hiroshi NOMURA
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Publication number: 20140233702Abstract: The problem addressed by the invention is to always keep an imaging angle of an X-ray detector to an object constant before and after an imaging unit is moved. In order to solve the problem, a mobile X-ray diagnostic apparatus related to the present invention detects a rotation amount of a main body in a horizontal surface due to movement on a floor surface and controls rotation drive of the X-ray detector based on a detection result.Type: ApplicationFiled: September 24, 2012Publication date: August 21, 2014Applicant: HITACHI MEDICAL CORPORATIONInventors: Koichiro Suzuki, Takahiro Yurugi, Yasuo Matsuoka
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Patent number: 8560977Abstract: According to one embodiment, a plurality of test drop recipes are first created based on design data on a semiconductor integrated circuit. Based on a defect inspection result of a pattern of a hardening resin material, which is formed by pressing a template on which patterns of the semiconductor integrated circuit are formed onto the hardening resin material applied to a substrate to be processed by use of the test drop recipes, a drop recipe with least defects is selected per press position on the substrate to be processed from the test drop recipes. The selected drop recipes for respective press positions are collected per functional circuit block configuring the semiconductor integrated circuit, thereby to generate a drop recipe creation assistant database.Type: GrantFiled: September 21, 2011Date of Patent: October 15, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Yasuo Matsuoka, Takumi Ota, Ryoichi Inanami
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Publication number: 20120208327Abstract: According to one embodiment, an imprint apparatus includes an ejection unit, an ejection command generating unit, a determining unit, a prohibition command generating unit, and an ejection control unit. The ejection unit ejects a resin material. The ejection command generating unit generates an ejection command based on a drop recipe. The determining unit determines the presence or absence of a processing target substrate in an ejection destination of the resin material. The prohibition command generating unit, when the processing target substrate is not present in an ejection destination, generates an ejection prohibition command. The ejection control unit gives priority to the ejection prohibition command over the ejection command.Type: ApplicationFiled: February 2, 2012Publication date: August 16, 2012Inventor: Yasuo MATSUOKA
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Publication number: 20120196389Abstract: According to one embodiment, electrolytic solution is selectively jetted onto an imprint pattern, the electrolytic solution is jetted onto each shot or part of an area in a shot, an electrode is separated for each shot, and the electrode is switched according to a shot to be an inspection target.Type: ApplicationFiled: December 19, 2011Publication date: August 2, 2012Inventor: Yasuo MATSUOKA
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Publication number: 20120131056Abstract: According to one embodiment, a plurality of test drop recipes are first created based on design data on a semiconductor integrated circuit. Based on a defect inspection result of a pattern of a hardening resin material, which is formed by pressing a template on which patterns of the semiconductor integrated circuit are formed onto the hardening resin material applied to a substrate to be processed by use of the test drop recipes, a drop recipe with least defects is selected per press position on the substrate to be processed from the test drop recipes. The selected drop recipes for respective press positions are collected per functional circuit block configuring the semiconductor integrated circuit, thereby to generate a drop recipe creation assistant database.Type: ApplicationFiled: September 21, 2011Publication date: May 24, 2012Inventors: Yasuo Matsuoka, Takumi Ota, Ryoichi Inanami
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Publication number: 20120129279Abstract: According to one embodiment, there is provided an imprinting method for applying a first hardening resin material on a substrate to be processed and transferring a pattern of a semiconductor integrated circuit formed on a template onto the substrate to be processed on which the first hardening resin material is applied, wherein a second hardening resin material with higher separability than the first hardening resin material is applied on at least part of the outer periphery of an area in which the pattern is formed by one transferring.Type: ApplicationFiled: September 12, 2011Publication date: May 24, 2012Inventors: Yasuo MATSUOKA, Takumi OTA, Ryoichi INANAMI
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Publication number: 20120072003Abstract: According to one embodiment, a defect inspection is made on a pattern transferred on substrates to be processed, thereby generating defect image data. When a defect is detected, a defect contour is extracted from the generated image data, the extracted defect contour is reflected on a pattern of the semiconductor integrated circuit and a first drop recipe is generated based on the pattern data on which the defect contour is reflected. A drop recipe used for applying a hardening resin material is updated with the generated first drop recipe.Type: ApplicationFiled: August 12, 2011Publication date: March 22, 2012Inventors: Yasuo MATSUOKA, Ryoichi Inanami, Akiko Mimotogi
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Publication number: 20120045854Abstract: According to one embodiment, a template for manufacturing a memory cell array comprising a relievable area and a redundant area replaceable with the relievable area is to be inspected. First, based on a defect position of a defect-detected template and position information on a relievable area, a decision is made as to whether the detected defect is positioned within the relievable area. A decision is made as to whether the number of defect-detected relievable areas exceeds the preset permissible number. When the detected defect is positioned outside the relievable area or when the number of defect-detected relievable areas exceeds the permissible number, a notification that the template has failed the inspection is output.Type: ApplicationFiled: August 12, 2011Publication date: February 23, 2012Inventors: Yasuo Matsuoka, Ryoichi Inanami
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Patent number: 6497319Abstract: A work transfer apparatus is equipped with a work feeder 23, a rotatable turn table 11 formed several work-storing pockets 11a at its outer periphery and a separation mechanism 24 provided between the work feeder 23 and the turn table 11. The separation mechanism 24 has a communicating passage 24a. A work detector (15a, 15b) is provided in the work-storing pocket 11a. A work stopper 14 is provided at the work feeder 23 on an upstream side of the work detector (15a, 15b), for separating a preceding work W1 and the succeeding work W2.Type: GrantFiled: November 9, 2001Date of Patent: December 24, 2002Assignee: Tokyo Weld Co., Ltd.Inventors: Kiminori Atsumi, Yasuo Matsuoka
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Publication number: 20020102157Abstract: A work transfer apparatus is equipped with a work feeder 23, a rotatable turn table 11 formed several work-storing pockets 11a at its outer periphery and a separation mechanism 24 provided between the work feeder 23 and the turn table 11. The separation mechanism 24 has a communicating passage 24a. A work detector (15a, 15b) is provided in the work-storing pocket 11a. A work stopper 14 is provided at the work feeder 23 on an upstream side of the work detector (15a, 15b), for separating a preceding work W1 and the succeeding work W2.Type: ApplicationFiled: November 9, 2001Publication date: August 1, 2002Inventors: Kiminori Atusmi, Yasuo Matsuoka
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Patent number: 6051371Abstract: A photomask substrate, which is formed in a rectangular shape and on the surface of which photoresist is applied, is located above a lower heating plate so as to be separated from the lower heating plate by a proximity distance. The lower heating plate is provided with a heat unifying ring fixedly arranged thereon so as to surround the photomask substrate. The periphery of the heat unifying ring is provided with a taper section tapered at a predetermined angle to the periphery. The heat unifying ring has a container for containing the photomask substrate, at the central portion. An upper heating plate is arranged above the lower heating plate. The upper heating plate is provided with a baking chamber thereabove to cover the entire portion of the baking chamber section, thereby the baking chamber section can be shielded from the outside and free from the influence of the outside.Type: GrantFiled: July 21, 1998Date of Patent: April 18, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Katsuhisa Mita, Yasuo Matsuoka, Kenichi Taniyama, Michirou Takano, Tsuneo Akasaki, Kaoru Kanda
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Patent number: 6033474Abstract: A photomask substrate, which is formed in a rectangular shape and on the surface of which photoresist is applied, is located above a lower heating plate so as to be separated from the lower heating plate by a proximity distance. The lower heating plate is provided with a heat unifying ring fixedly arranged thereon so as to surround the photomask substrate. The periphery of the heat unifying ring is provided with a taper section tapered at a predetermined angle to the periphery. The heat unifying ring has a container for containing the photomask substrate, at the central portion. An upper heating plate is arranged above the lower heating plate. The upper heating plate is provided with a baking chamber thereabove to cover the entire portion of the baking chamber section, thereby the baking chamber section can be shielded from the outside and free from the influence of the outside.Type: GrantFiled: July 22, 1998Date of Patent: March 7, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Katsuhisa Mita, Yasuo Matsuoka, Kenichi Taniyama, Michirou Takano, Tsuneo Akasaki, Kaoru Kanda
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Patent number: 5817178Abstract: A photomask substrate, which is formed in a rectangular shape and on the surface of which photoresist is applied, is located above a lower heating plate so as to be separated from the lower heating plate by a proximity distance. The lower heating plate is provided with a heat unifying ring fixedly arranged thereon so as to surround the photomask substrate. The periphery of the heat unifying ring is provided with a taper section tapered at a predetermined angle to the periphery. The heat unifying ring has a container for containing the photomask substrate, at the central portion. An upper heating plate is arranged above the lower heating plate. The upper heating plate is provided with a baking chamber thereabove to cover the entire portion of the baking chamber section, thereby the baking chamber section can be shielded from the outside and free from the influence of the outside.Type: GrantFiled: May 29, 1996Date of Patent: October 6, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Katsuhisa Mita, Yasuo Matsuoka, Kenichi Taniyama, Michirou Takano, Tsuneo Akasaki, Kaoru Kanda
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Patent number: 5362482Abstract: A water-in-oil type emulsified solid composition containing (a) an oil component such as a silicone oil, (b) a solid wax and/or an oil-gelling agent, (c) water, and (d) (i) a polyoxyalkylene modified organopolysiloxane or (ii) a lipophilic surfactant and a hydrophobically treated powder, wherein the water content is 5% by weight or more, based upon the total amount of the composition.Type: GrantFiled: February 10, 1993Date of Patent: November 8, 1994Assignee: Shiseido Company Ltd.Inventors: Toshio Yoneyama, Yasuo Matsuoka, Harumi Suzuki, Shigenori Kumagai, Susumu Takada
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Patent number: RE46901Abstract: According to one embodiment, a plurality of test drop recipes are first created based on design data on a semiconductor integrated circuit. Based on a defect inspection result of a pattern of a hardening resin material, which is formed by pressing a template on which patterns of the semiconductor integrated circuit are formed onto the hardening resin material applied to a substrate to be processed by use of the test drop recipes, a drop recipe with least defects is selected per press position on the substrate to be processed from the test drop recipes. The selected drop recipes for respective press positions are collected per functional circuit block configuring the semiconductor integrated circuit, thereby to generate a drop recipe creation assistant database.Type: GrantFiled: October 14, 2015Date of Patent: June 19, 2018Assignee: Toshiba Memory CorporationInventors: Yasuo Matsuoka, Takumi Ota, Ryoichi Inanami