Patents by Inventor Yasuo Nagazumi

Yasuo Nagazumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6473454
    Abstract: A RAKE combiner apparatus uses a charge transfer element, which can permit a high-precision RAKE receiver to be constructed by a simple circuit structure, has lower consumption power, can allow the finger number to be arbitrarily set within a range of up to the number of taps of the matched filter and can implement a highly efficient RAKE process.
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: October 29, 2002
    Assignees: G.D.S. Co., Ltd
    Inventor: Yasuo Nagazumi
  • Patent number: 6381261
    Abstract: A random pulse type radar apparatus sends out as an output signal a spectrum spread radio wave including a pseudo random signal-less period and receives echoes in this signal-less period to thereby significantly reduce transmission peak power.
    Type: Grant
    Filed: November 23, 1998
    Date of Patent: April 30, 2002
    Assignees: G.D.S. Co., Ltd.
    Inventor: Yasuo Nagazumi
  • Patent number: 5987491
    Abstract: A general purpose charge mode, analog operation circuit provides adder, multiplier, divider (D/A converter) and other functions using a single hardware configuration to be used in different modes. A two-dimensional lattice circuit including electrical charge transfer devices, each driven by charge transfer electrodes, all or a portion of which having structures allowing independent control, and a plurality of the electrical charge transfer devices adjacent to each other in the circuit are controlled successively with respect to the analog circuit charge signals to provide operation functions such as addition, multiplication, division, and sign inversion.
    Type: Grant
    Filed: October 31, 1995
    Date of Patent: November 16, 1999
    Assignees: G.D.S. Co., Ltd., Yasuo Nagazumi
    Inventor: Yasuo Nagazumi
  • Patent number: 5936461
    Abstract: The object of the present invention is to obtain a charge domain signal filter by composing an digital filter circuit with analog/digital mixed circuit and by introducing the analog processing into the process of multiplication and addition consuming the most of the electric power so as to reduce the total power consumption. The present invention is composed of at least one AD converter; at least one reference charge supply unit; a coefficient supply unit for supplying coefficient signals; a plurality of DA converters acting in a charge domain for receiving digital signal outputs supplied from said AD converter and said coefficient signal supply unit, and for performing the multiplication type DA conversion using, as a reference signal, a reference charge packet generated by said reference charge supply unit; and one circuit of analog shift register composed of N stages of charge transfer devices.
    Type: Grant
    Filed: June 11, 1997
    Date of Patent: August 10, 1999
    Assignees: C.D.S. Co., Ltd., Yasuo Nagazumi
    Inventor: Yasuo Nagazumi
  • Patent number: 5936567
    Abstract: A data supply method for performing exact operations by a number of operation units receiving a single signal as input is proposed; and a composition of a system provided with both the filter function and the AD conversion function using the same is also proposed. The system comprises a charge signal supply unit, which is a charge splitter composed of charge transfer devices for splitting a input charge signal into N signal charge parts, for supplying as input for said charge splitter S (S is an integer equal or superior to 2) series of source time series charge signals as a single time series signal by multiplexing the same by the time division multiplexing; and a demultiplexing mechanism for taking as respective inputs the N outputs from said charge splitter, and for separating multiplexed S series of time series charge signals contained in this input to convert them into an independent time series signals.
    Type: Grant
    Filed: October 15, 1997
    Date of Patent: August 10, 1999
    Assignees: G.D.S. Co., Ltd., Yasuo Nagazumi
    Inventor: Yasuo Nagazumi
  • Patent number: 5887025
    Abstract: A charge mode operation circuit dedicated to detect the correlation between analog input signal and digital code, and for realizing by "RAKE method" the path diversity reception from the correlation data obtained using the same. The circuit utilizes an analog shift register using at least one charge transfer device for transferring a charge signal packet, a plurality of charge signal generation units, arranged along the analog shift register and provided, respectively, with substantially uniform voltage charge conversion characteristic controlled by a common input sign; and a routing mechanism for selectively transferring output charge packets generated by the plurality of charge signal generation units in given directions according to digital bit signal provided separately.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: March 23, 1999
    Assignees: G.D.S. Co., Ltd., Yasuo Nagazumi
    Inventor: Yasuo Nagazumi
  • Patent number: 5867526
    Abstract: A charge mode operation circuit dedicated to detect the correlation between analog input signal and digital code, and for realizing by "RAKE method" the path diversity reception from the correlation data obtained using the same. The circuit utilizes an analog shift register using at least one charge transfer device for transferring a charge signal packet, a plurality of charge signal generation units, arranged along the analog shift register and provided, respectively, with substantially uniform voltage charge conversion characteristic controlled by a common input sign; and a routing mechanism for selectively transferring output charge packets generated by the plurality of charge signal generation units in given directions according to digital bit signal provided separately.
    Type: Grant
    Filed: December 24, 1997
    Date of Patent: February 2, 1999
    Assignees: G.D.S Co., Ltd., Yasuo Nagazumi
    Inventor: Yasuo Nagazumi
  • Patent number: 5701260
    Abstract: A multiplier using a charge transfer device, broadly applicable to analog signal processing, digital-to-analog (D/A) conversion, or parallel image processing. The multiplier includes a charge transfer device with at least 8 independent potential wells arranged in a ring, and charge signal accumulators having at least one set of a plurality of independently controlled potential wells connected in serial to at least one of these potential wells on the ring.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: December 23, 1997
    Assignee: G.D.S. Co., Ltd.
    Inventor: Yasuo Nagazumi
  • Patent number: 5634067
    Abstract: A systolic array processor is provided which is adapted to virtually constitute a number of analog type pipelining processors which operate in a parallel manner on an analog type shift register array such as a CCD or the like. The processor is composed of a plurality of signal processors for performing signal processings for a plurality of signals including an analog signal or signals supplied as input signals thereto and determining analog outputs, a shift register array or shift register mesh consisting of a plurality of shift registers, and a timing controller for controlling signal processings, arithmetic additions, shift operations and sequences in time of control for shift directions, of the shift registers. The shift register array or mesh includes analog shift registers having functions of performing the addition of input signals, and the analog outputs are supplied to the analog shift registers as one input signals thereof, respectively.
    Type: Grant
    Filed: November 18, 1994
    Date of Patent: May 27, 1997
    Assignees: G.D.S. Co., Ltd., Yasuo Nagazumi
    Inventor: Yasuo Nagazumi
  • Patent number: 5539404
    Abstract: Analog memories such as CCD, which are advantageous in less power consumption and higher integration density, are used to configure a system for highly accurately executing digital/analog processing. A digital to analog converter according to the invention has at least one first analog memory having an input port for receiving input signal packets and a partial output drive port for driving the i-th output signal packet; at least one second analog memory having a function to integrate input signal packets applied thereto; and at least one signal packet routing mechanism for selectively routing output signal packets from the first analog memory according to an input digital signal bit. The extremely simple configuration of the present invention may be effectively utilized for realizing an ultra-parallel analog processor as well as applied to other fields such as video processing by combining a function of an input means for optical signals, which has been a main application of the CCD.
    Type: Grant
    Filed: February 7, 1994
    Date of Patent: July 23, 1996
    Assignees: Yasuo Nagazumi, G.D.S. Co., Ltd.
    Inventor: Yasuo Nagazumi
  • Patent number: 5537115
    Abstract: Analog memories such as CCD, which are advantageous in less power consumption and higher integration density, are used to configure a system for highly accurately executing analog/digital processing. An analog to digital converter according to the invention has at least one first analog memory having an input port for receiving input signal packets and a partial output drive port for driving the i-th output signal packet; at least one second analog memory having a function to integrate input signal packets applied thereto; and at least one signal packet routing mechanism for selectively routing output signal packets from the first analog memory according to an input digital signal bit. The extremely simple configuration of the present invention may be effectively utilized for realizing an ultra-parallel analog processor as well as applied to other fields such as video processing by combining a function of an input means for optical signals, which has been a main application of the CCD.
    Type: Grant
    Filed: May 27, 1994
    Date of Patent: July 16, 1996
    Assignees: Yasuo Nagazumi, G.D.S. Co., Ltd.
    Inventor: Yasuo Nagazumi
  • Patent number: 5530953
    Abstract: The apparatus includes a plurality of groups of plural data paths which are connected in such a manner that each data path of one group intersects with one or more data paths of another or more data path groups. Each data path of each group is composed of a shift register and at least one of the data paths of each group transfer a signal imputed thereto in a different direction from at least one of the remaining data paths thereof when one of the shift registers thereof is operated.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: June 25, 1996
    Assignees: Yasuo Nagazumi, G.D.S. Co., Ltd.
    Inventor: Yasuo Nagazumi
  • Patent number: 5247472
    Abstract: A fuzzy logic operation circuit for two inputs includes two identical charge coupled devices having at least first and second gate electrodes connected in parallel on an output side and floating gates provided to a transfer electrode on an input side. A comparison device compares charge detection signals from the floating gates with each other and selects an input signal of either the smaller or greater of the two inputs by the comparison output.
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: September 21, 1993
    Assignee: G.D.S. Co., Ltd.
    Inventor: Yasuo Nagazumi
  • Patent number: 5228111
    Abstract: A fuzzy computer includes a defuzzifier composed of charge coupled devices which intake and transfer a set of fuzzy data elements in parallel. Pairs of positive and negative gate electrodes are located transversely to the charge coupled devices. The gate electrodes in each pair differ in their effective area to the corresponding charge coupled devices and all the positive and negative electrodes are connected together in respective groups. Each of the positive and negative groups senses independently as an electronic signal, such as voltage, the sum of weighted charge value at each charge coupled device behind the electrodes, multiplying by the weighing factors which are determined by the effective area of each electrode. A total output is obtained as the difference of the output signals at the positive and negative electrode groups.
    Type: Grant
    Filed: March 9, 1992
    Date of Patent: July 13, 1993
    Assignee: G.D.S. Co., Ltd.
    Inventor: Yasuo Nagazumi
  • Patent number: 5136685
    Abstract: A fuzzy logic operation circuit for two inputs includes two identical charge coupled devices having at least first and second gate electrodes connected in parallel on an output side and floating gates provided to a transfer electrode on an input side. A comparison device compares charge detection signals from the floating gates with each other and selects an input signal of either the smaller or greater of the two inputs by the comparison output.A fuzzy computer includes a defuzzifier composed of charge coupled devices which intake and transfer a set of fuzzy data elements in parallel. Pairs of positive and negative gate electrodes are located transversely to the charge coupled devices. The gate electrodes in each pair differ in their effective area to the corresponding charge coupled devices and all the positive and negative electrodes are connected together in respective groups.
    Type: Grant
    Filed: February 9, 1990
    Date of Patent: August 4, 1992
    Assignee: G.D.S. Co., Ltd.
    Inventor: Yasuo Nagazumi
  • Patent number: 5084901
    Abstract: A sequential chirp modulation-type spread spectrum communication system is disclosed relating to the FH-type which realizes fine transmission quality at low cost. It comprises at least primary and secondary digital sine wave generators of a program controlled-type mounted respectively on a transmitter of a transmitting side and a receiver of a receiving side. The primary sine wave generator generates a sine wave having a frequency which changes almost continuously and Pseudo-Random in the specified range of frequency according to the program. The primary digital sine wave generator also transmits the sine wave from the transmitting side after modulating the sine wave with the signals which should be transmitted. The secondary digital sine wave generator generates a sine wave having a frequency in which the specified frequency is a constant distance from the receiving signal frequency and receiving the receiving signal after demodulating.
    Type: Grant
    Filed: December 22, 1989
    Date of Patent: January 28, 1992
    Assignee: G.D.S. Co., Ltd.
    Inventor: Yasuo Nagazumi
  • Patent number: 4891633
    Abstract: A digital image exchange system comprises a data transmission line, at least one video RAM, at least one video signal generator for accessing data from the video RAM and for developing at least two video signals corresponding respectively to the accessed data, and at least one modulator for modulating the video signals to form transmitted signals in at least two different frequency bands to be transmitted on the data transmission line. At least one demodulator is coupled to the transmission line at a location remote from the modulator for demodulating the transmitted signals in each of the at least two frequency bands to form at least two corresponding video signals; and at least one video display device is operatively coupled with the demodulator for displaying visual images corresponding to the respective video signals.
    Type: Grant
    Filed: July 23, 1984
    Date of Patent: January 2, 1990
    Assignee: General Research of Electronics, Inc.
    Inventors: Kazuyoshi Imazeki, Yasuo Nagazumi
  • Patent number: 4759034
    Abstract: In a pseudo-random communication system, a transmitter-generated encoded signal is to be correlated with a receiver-generated similarly encoded signal for recognizing synchronization of the transmitted and received signals in the presence of undesired received energy. The system comprises a spread-spectrum transmitter including at least two pseudo-noise generators for producing at least two pseudo-noise signals which are related in a predetermined fashion, a mixer for receiving and mixing the two pseudo-noise signals with respective carrier and information signals to produce an output signal, and apparatus for transmitting the output signal. The system also includes a spread-spectrum receiver comprising a correlator and a matched filter coupled in circuit to form a synchronization detector circuit for receiving and detecting the encoded output signal transmitted by the transmitter so as to recover the information therefrom.
    Type: Grant
    Filed: December 2, 1986
    Date of Patent: July 19, 1988
    Assignee: General Research of Electronics, Inc.
    Inventor: Yasuo Nagazumi
  • Patent number: 4581610
    Abstract: A method for intensifying brightness of a predetermined pattern in a video display comprises detecting the duration of predetermined portions of said video signal; detecting the predetermined pattern in these predetermined portions of said video signal; and producing an output control signal in response to each detection of the predetermined pattern of at least a predetermined duration. Apparatus is provided for carrying out the method.
    Type: Grant
    Filed: April 6, 1983
    Date of Patent: April 8, 1986
    Assignee: General Research of Electronics, Inc.
    Inventor: Yasuo Nagazumi
  • Patent number: 3973650
    Abstract: An improved mechanical energy absorbing device is herein disclosed which includes an elongated member plastically deformable in a longitudinal direction when subjected to a mechanical force greater than an elastic limit of the member in the longitudinal direction so that the mechanical energy applied to the device is at least partly consumed in the plastic deformation of the elongated member. A typical application of the energy absorbing device is a safety harness for a seat of a motor vehicle or airplane although the device may lend itself to various other practical purposes.
    Type: Grant
    Filed: December 20, 1974
    Date of Patent: August 10, 1976
    Assignee: Nissan Motor Co., Ltd.
    Inventor: Yasuo Nagazumi