Abstract: A tire and an assembly of a rim and a tire are disclosed. The rim has a pair of rim bases, a hump formed axially inside each rim base, and an annular groove formed axially inside each hump.The tire comprises a pair of beads having a bead base seated on the rim base, a pair of bead cores disposed one in each bead, at least one of the beads having a toe and a hump groove disposed between the toe and the bead base, wherein, the tip of the toe is located radially outside a bead base line, and under such condition; that the tire is inflated to a normal internal pressure, the hump groove and the tip of the toe are spaced apart from the hump and the annular groove, and the distance L in the radial direction between the radially outermost point RT of the hump and the radially outermost point PT of the hump groove is not less than 0.5 mm and not more than 2.0 mm.

Abstract: An apparatus for determining the shape of contact patch and the contact pressure of a tire comprises a contact member made of a transparent material, a pressing unit for pressing the outer peripheral surface of the tire against the contact member, a sheet having elastic projections arranged regularly on one surface thereof and uniformly distributed thereover, and an observation device for observing through the contact member the projections as deformed when the tire is pressed against the contact member with the sheet interposed therebetween and with the projections thereof facing the contact member. The shape of contact patch and contact pressure of the tire can be determined by observing deformed projections by the device.

Abstract: A tire and an assembly of a rim and a tire are disclosed. The rim has a pair of rim bases, a hump formed axially inside each rim base, and an annular groove formed axially inside each hump.The tire comprises a pair of beads having a bead base seated on the rim base, a pair of bead cores disposed one in each bead, at least one of the beads having a toe and a hump groove disposed between the toe and the bead base, wherein the tip of the toe is located radially outside a bead base line, and under such condition that the tire is inflated to a normal internal pressure, the hump groove and the tip of the toe are spaced apart from the hump and the annular groove, and the distance L in the radial direction between the radially outermost point RT of the hump and the radially outermost point PT of the hump groove is not less than 0.5 mm and not more than 2.0 mm.

Abstract: An apparatus for manufacturing a multielement sintered material is provided, more particularly an appartus of the automated type which weighs and mixes predetermined amounts of powdery elements, molds the mixed elements and then sinters them.

Abstract: An equipment for manufacturing semiconductor devices has: a reaction chamber in which a substrate to be processed is placed; means for evacuating the reaction chamber; means for introducing a reaction gas into the reaction chamber; means for applying polarized light to the surface of the substrate for the purpose of depositing a thin film on the surface of the substrate using a photochemical reaction between the light and the reaction gas; and means for adjusting the direction of polarization of the light so as to be substantially perpendicular to the longitudinal axis of a stepped circuit pattern present on the surface of the substrate for the purpose of flattening the circuit pattern.

Abstract: A memory is disclosed which uses a microcapacitor as a data storage portion. The microcapacitor uses as its main electrode surface the side wall of a first trench formed on a semiconductor substrate, and is fabricated by diffusing an impurity from a second diffusion trench adjacent to the first trench by setting the shapes and diffusion conditions of the first and second trenches so that the tip of the diffusion layer reaches the side wall of the first trench. The capacitor uses the diffusion layer as one of the electrodes. An insulating film is deposited on the side wall of the first trench and an electrode as the other electrode of the capacitor is deposited on this insulating film. The memory can reduce a leakage current between memory cells by connecting the capacitor to a transistor fabricated in the same semiconductor substrate, and can be formed within a limited space.

Abstract: Of an amorphous Si film, a region to be formed into a lowly doped region such as the channel region of an MOS transistor is covered with a mask and an uncovered region is doped with an impurity. After this, the amorphous Si film is annealed and turned to signal crystal through solid phase epitaxial growth, and the mask itself is used as the electrode of a semiconductor device. By this impurity doping, a large-sized single-crystal Si film can be formed, and the impurity doping can be conducted in self-alignment with the electrode formation to produce a highly integrated semiconductor circuit.

Abstract: A desired portion of a refractory metal silicide film is oxidized by anodic oxidation to form oxides of silicon and of metal. The oxides formed are completely removed by etching. By so doing, the desired portion of the silicide film can be etched selectively without badly damaging an underlying silicon substrate or silicon dioxide film. Therefore, it is possible to easily affect patterning of the silicide film used for electrodes of MOS transistors and bipolar transistors as well as resistors and interconnections.

Abstract: First conductivity type impurity ions are implanted at a predetermined depth all over a region where impurity ions are to be implanted, and second conductivity type impurity ions are implanted in a dose about twice as large as that of the first conductivity type impurity ions at substantially the same implantation depth of the first conductivity type impurity ions, followed by annealing.In this way, mutually contiguous first and second conductivity type regions having substantially the same impurity concentrations and located at substantially the same depths are formed.

Abstract: A desired part of a workpiece is irradiated with a focused ion beam which contains at least two species of impurity ions to-be-implanted exhibiting different spacial distributions of ion current densities.Thus, regions respectively implanted with different species of impurity ions can be formed in a predetermined positional relationship at high precision.

Abstract: A semiconductor device manufacturing apparatus is disclosed which comprises a reaction chamber; at least one light source for radiating light to a wafer disposed in the reaction chamber and performing plural processes by the photo-assisted reactions; a gas introducing means for introducing gaseous reactants into the reaction chamber; a gas exhausting means for exhausting the interior of the reaction chamber; and a light source for removing by light irradiation undesirable gaseous constituents which adhered to the wafer and the chamber inner wall in the preceding step. Since undesirable gaseous constituents adhered to the wafer and thereabouts can be removed, it is possible to effect plural processes for the wafer in the same chamber.

Abstract: Ions having a high energy is implanted using a mask of a stacked film consisting of a film formed from an amorphous material and a film formed from a metal having a large mass number.In this way, penetration of ions can be prohibited by a mask having a far smaller thickness than that of the conventional mask. Thus ions having a high energy can be implanted with a very high accuracy.

Abstract: Herein disclosed is a semiconductor device having at least one lower resistance region formed in the single-crystalline semiconductor film which is so formed to continuously coat both a single-crystalline semiconductor substrate and an insulating film formed on the surface of the substrate.Since the aforementioned single-crystalline semiconductor film is used, many advantages which are not attained from the semiconductor device according to the prior art can be obtained.The aforementioned single-crystalline semiconductor film is formed by irradiating a polycrystalline or amorphous semiconductor film with a laser beam.

Abstract: A polycrystalline silicon film is implanted with an impurity in large amounts and is heated to be annealed, whereupon it is irradiated with a laser beam to be annealed.Thus, a polycrystalline silicon film of very low resistivity consisting of a second layer whose activated impurity concentration is equal to or below a solid solubility and a first layer whose activated impurity concentration is above the solid solubility is formed.

Abstract: An insulating film is formed on a semiconductor substrate, and the insulating film on that part of the semiconductor substrate where an emitter is to be formed, is removed to expose the surface of the above part. A polycrystalline or amorphous silicon film is deposited on the entire surface, and then irradiated with a laser beam to convert that portion of the polycrystalline or amorphous silicon film which is deposited on the surface of the semiconductor substrate without interposing the insulating film therebetween, into a single crystal of silicon, thereby forming a stacked emitter.

Abstract: A region containing a high concentration of impurity and a desired region adjacent thereto are fused by irradiation with a laser beam, to diffuse the impurity in the lateral direction into the desired region and to render the desired region a low resistance.Since this method can execute only the lateral diffusion of the impurity without affecting other portions, it is very useful for forming a high breakdown voltage MIS-FET, a resistor etc.

Abstract: A polycrystalline silicon layer is deposited by chemical vapor deposition method at a predetermined location on an oxide film grown by thermal oxidation on a surface of a monocrystal silicon substrate. Nitrogen ions are implanted in the outer surface of the polycrystalline silicon layer and the exposed surface of the oxide film. The whole surfaces are oxidized by wet oxidation so as to form a thick oxide layer at the surface of the oxide film which is not covered by the polycrystalline silicon layer.