Patents by Inventor Yasushi Iha

Yasushi Iha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9030572
    Abstract: An apparatus, a method, and a program for processing an image are provided. The apparatus includes: a determiner which determines an area corresponding to a white-saturation area included in a raw image based on raw data representing the raw image, wherein the raw image is obtained by photographing and is not processed; and a converter which selectively performs an image space frequency distribution conversion on a portion of the raw data that corresponds to the determined area corresponding to the white-saturation area. The converter reduces luminance changes of pixels which are not a preset reference pixel in the area corresponding to the white-saturation area.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: May 12, 2015
    Assignee: Samsung Techwin Co., Ltd.
    Inventor: Yasushi Iha
  • Publication number: 20140152864
    Abstract: An apparatus, a method, and a program for processing an image are provided. The apparatus includes: a determiner which determines an area corresponding to a white-saturation area included in a raw image based on raw data representing the raw image, wherein the raw image is obtained by photographing and is not processed; and a converter which selectively performs an image space frequency distribution conversion on a portion of the raw data that corresponds to the determined area corresponding to the white-saturation area. The converter reduces luminance changes of pixels which are not a preset reference pixel in the area corresponding to the white-saturation area.
    Type: Application
    Filed: October 15, 2013
    Publication date: June 5, 2014
    Applicant: SAMSUNG TECHWIN CO., LTD.
    Inventor: Yasushi IHA
  • Patent number: 7570307
    Abstract: A filter device comprises a digital filter, a maximum/minimum detector circuit, and a limiter circuit. The digital filter includes unit delay elements chained together and having M stages (M is an integer equal to or larger than two) for shifting an n-bit (n is a positive integer) digital input signal; n multiplier circuits for multiplying output signals from the unit delay elements at the respective stages by predetermined filter coefficients, respectively; and adder circuits chained together and having (M?1) stages for summing output signals from the respective multiplier circuits to supply a filtered output signal. The maximum/minimum detector circuit detects a maximum value detection signal and a minimum value detection signal in the output signals supplied from the unit delay elements. The limiter circuit limits a minimum value of the filtered output signal based on the maximum value detection signal, and limits a minimum value of the filtered output signal based on the minimum value detection signal.
    Type: Grant
    Filed: April 20, 2005
    Date of Patent: August 4, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Yasushi Iha, Takaaki Akiyama
  • Publication number: 20060062337
    Abstract: A filter device comprises a digital filter, a maximum/minimum detector circuit, and a limiter circuit. The digital filter includes unit delay elements chained together and having M stages (M is an integer equal to or larger than two) for shifting an n-bit (n is a positive integer) digital input signal; n multiplier circuits for multiplying output signals from the unit delay elements at the respective stages by predetermined filter coefficients, respectively; and adder circuits chained together and having (M?1) stages for summing output signals from the respective multiplier circuits to supply a filtered output signal. The maximum/minimum detector circuit detects a maximum value detection signal and a minimum value detection signal in the output signals supplied from the unit delay elements. The limiter circuit limits a minimum value of the filtered output signal based on the maximum value detection signal, and limits a minimum value of the filtered output signal based on the minimum value detection signal.
    Type: Application
    Filed: April 20, 2005
    Publication date: March 23, 2006
    Inventors: Yasushi Iha, Takaaki Akiyama