Abstract: According to one embodiment, an edge of the second opening is recessed further than an edge of the first opening away from a center of the first opening. The recess has an opening and a concave surface and is disposed in a region inward from the edge of the second opening. The opening has a circular configuration. The concave surface has a curvature.

Abstract: A solid-state imaging device includes a light detector provided inside a semiconductor body; a first insulating film provided on a front surface of the semiconductor body; a plurality of second insulating films provided between the light detector and the first insulating film, the plurality of second insulating films arranged in a first direction along the front surface of the semiconductor body; and a third insulating film provided between the semiconductor body and the second insulating films, the third insulating film having a refractive index lower than a refractive index of the second insulating films.

Abstract: According to one embodiment, the interconnect layers include a first interconnect layer and a second interconnect layer. The second interconnect layer is provided on the first interconnect layer. The insulating layer is provided between the plurality of interconnect layers. The barrier metal film is provided at a surface of the first interconnect layer but not provided at a surface of the second interconnect layer. The plugs connect the first interconnect layer and the second interconnect layer, and are provided between the first interconnect layer and the second interconnect layer. The plugs are arranged at a spacing of 200 ?m or less along a longitudinal direction of the second interconnect layer.

Abstract: According to one embodiment, a solid-state imaging device includes a substrate, a light receiving pixel, a first interconnection layer, a light shielding layer, and a first metal film. The substrate includes a sensor region and a circuit region. The light receiving pixel is provided on a surface of the sensor region of the substrate. The first interconnection layer is provided in the sensor region. The light shielding layer is provided in the sensor region and has a larger width than the first interconnection. The first metal film is provided on at least one of an upper surface or a lower surface of the light shielding layer. The first metal film partially covers at least one of the upper surface or the lower surface.

Abstract: According to one embodiment, the interconnect layers include a first interconnect layer and a second interconnect layer. The second interconnect layer is provided on the first interconnect layer. The insulating layer is provided between the plurality of interconnect layers. The barrier metal film is provided at a surface of the first interconnect layer but not provided at a surface of the second interconnect layer. The plugs connect the first interconnect layer and the second interconnect layer, and are provided between the first interconnect layer and the second interconnect layer. The plugs are arranged at a spacing of 200 ?m or less along a longitudinal direction of the second interconnect layer.

Abstract: According to one embodiment, an edge of the second opening is recessed further than an edge of the first opening away from a center of the first opening. The recess has an opening and a concave surface and is disposed in a region inward from the edge of the second opening. The opening has a circular configuration. The concave surface has a curvature.

Abstract: According to one embodiment, a solid-state imaging device includes a substrate, a light receiving pixel, a first interconnection layer, a light shielding layer, and a first metal film. The substrate includes a sensor region and a circuit region. The light receiving pixel is provided on a surface of the sensor region of the substrate. The first interconnection layer is provided in the sensor region. The light shielding layer is provided in the sensor region and has a larger width than the first interconnection. The first metal film is provided on at least one of an upper surface or a lower surface of the light shielding layer. The first metal film partially covers at least one of the upper surface or the lower surface.

Abstract: According to one embodiment, a solid-state imaging device includes a photoelectric conversion element, a light blocking section, and a protective layer. The protective layer protects the photoelectric conversion element and the light blocking section. A step section is formed on a surface of the protective layer. The step section is formed having a difference in height in a direction perpendicular to an irradiation surface of the photoelectric conversion element. The step section is provided in the light receiving area.

Abstract: According to one embodiment, a semiconductor device includes a semiconductor substrate which includes a first chip area and a second chip area. An insulation film is formed over the substrate. An electrical circuit is formed in the first chip area and is electrically independent from any component in another chip area. The electrical circuit includes an electrical element and an interconnect on the substrate and in the insulation film. Boundary patterns are formed in the insulation film between the first and second chip areas, are electrically independent from the electrical circuit, and have a gap therebetween. One of the boundary patterns surrounds the first chip area.

Abstract: According to one embodiment, a solid-state imaging device includes a photoelectric conversion element, a light blocking section, and a protective layer. The protective layer protects the photoelectric conversion element and the light blocking section. A step section is formed on a surface of the protective layer. The step section is formed having a difference in height in a direction perpendicular to an irradiation surface of the photoelectric conversion element. The step section is provided in the light receiving area.

Abstract: A method of manufacturing wiring layers of semiconductor devices in which a base layer made of electroconductive material is formed on a wiring-intended area of the substrate surface and an insulating layer is formed on the area other than the wiring intended area. Then the wiring layer is grown on the base layer up to substantially the same level as that of the insulating layer up, hereby planarity of the surfaces of the device is maintained after wiring formation.