Patents by Inventor Yasushi Kakimura

Yasushi Kakimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MIS capacitor and production method of MIS capacitor
    Publication number: 20060040460
    Abstract: Silicon wafer, with diffusion area formed in a predetermined area of one side, consists of the lower electrode of capacitor. The first metal layer is connected to the first power supply wiring VDD and consists of the upper electrode of capacitor. The second metal layers are connected to the second power supply wiring GND and are formed on the side where diffusion area is formed on silicon wafer. Oxide film is placed between the first metal layer and the surface of silicon wafer where the diffusion area is formed.
    Type: Application
    Filed: February 15, 2005
    Publication date: February 23, 2006
    Applicant: Fujitsu Limited
    Inventors: Yasushi Kakimura, Keisuke Muraya
  • Variable frequency multiple loop ring oscillator
    Patent number: 6157267
    Abstract: A variable frequency oscillator including an oscillation unit including a ring oscillator having multiple loops, and a frequency control unit controlling switching among the multiple loops in accordance with a control input indicative of an oscillation frequency and thus generating an oscillation signal having the oscillation frequency.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: December 5, 2000
    Assignee: Fujitsu Limited
    Inventor: Yasushi Kakimura