Patents by Inventor Yasushi Kurokawa

Yasushi Kurokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9077625
    Abstract: An apparatus controls a transmission interval of maintenance packets in a communication network. The apparatus calculates, within a first bandwidth available for the transmission and reception of packets, a second bandwidth that is free in the apparatus and usable for transmitting and receiving the maintenance packets for maintenance of the communication network. The apparatus determines a transmission interval of maintenance packets in accordance with the calculated second bandwidth and transmits the maintenance packets to another apparatus in the communication network at the determined transmission interval.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: July 7, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Eitatsu Yoshida, Yasushi Kurokawa, Yuichiro Katsura
  • Patent number: 8989184
    Abstract: A disclosed apparatus is a message relay apparatus. This message relay apparatus includes: a receiver that receives a message to be transferred; a determination unit that determines whether or not the message relay apparatus can afford to perform a conversion processing, when performing the conversion processing for the message; a selection unit that selects another apparatus to which the conversion processing is requested based on stored information representing other apparatuses that can afford to perform the conversion processing, when the message relay apparatus cannot afford to perform the conversion processing; a requesting unit that requests the selected another apparatus to perform the conversion processing for the message, and receives the converted message from the selected another apparatus; and a transmission unit that transmits the received and converted message to a transfer destination.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: March 24, 2015
    Assignee: Fujitsu Limited
    Inventors: Kei Hamada, Kouichirou Amemiya, Yasushi Kurokawa, Yuichiro Katsura
  • Patent number: 8966484
    Abstract: An information processing apparatus makes a plurality of threads concurrently execute tasks stored in a task queue associated with the thread a prescribed number of times of execution. The information processing apparatus includes a processor that executes the plurality of threads that executes a procedure. The procedure includes generating a task from among a plurality of tasks into which a serial program processing corresponding to a processing request is divided, selecting the task queue associated with one of the plurality of threads, enqueuing the generated task to the selected task queue, dequeuing the enqueued task to the task queue associated with the thread, and executing the dequeued task.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: February 24, 2015
    Assignee: Fujitsu Limited
    Inventors: Kei Hamada, Kouichirou Amemiya, Yasushi Kurokawa, Yumiko Ogata, Eitatsu Yoshida
  • Publication number: 20130315071
    Abstract: An apparatus controls a transmission interval of maintenance packets in a communication network. The apparatus calculates, within a first bandwidth available for the transmission and reception of packets, a second bandwidth that is free in the apparatus and usable for transmitting and receiving the maintenance packets for maintenance of the communication network. The apparatus determines a transmission interval of maintenance packets in accordance with the calculated second bandwidth and transmits the maintenance packets to another apparatus in the communication network at the determined transmission interval.
    Type: Application
    Filed: March 22, 2013
    Publication date: November 28, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Eitatsu YOSHIDA, Yasushi Kurokawa, Yuichiro Katsura
  • Publication number: 20130242994
    Abstract: A disclosed apparatus is a message relay apparatus. This message relay apparatus includes: a receiver that receives a message to be transferred; a determination unit that determines whether or not the message relay apparatus can afford to perform a conversion processing, when performing the conversion processing for the message; a selection unit that selects another apparatus to which the conversion processing is requested based on stored information representing other apparatuses that can afford to perform the conversion processing, when the message relay apparatus cannot afford to perform the conversion processing; a requesting unit that requests the selected another apparatus to perform the conversion processing for the message, and receives the converted message from the selected another apparatus; and a transmission unit that transmits the received and converted message to a transfer destination.
    Type: Application
    Filed: December 17, 2012
    Publication date: September 19, 2013
    Inventors: Kei HAMADA, Kouichirou Amemiya, Yasushi Kurokawa, Yuichiro Katsura
  • Publication number: 20130061229
    Abstract: An information processing apparatus makes a plurality of threads concurrently execute tasks stored in a task queue associated with the thread a prescribed number of times of execution. The information processing apparatus includes a processor that executes the plurality of threads that executes a procedure. The procedure includes generating a task from among a plurality of tasks into which a serial program processing corresponding to a processing request is divided, selecting the task queue associated with one of the plurality of threads, enqueuing the generated task to the selected task queue, dequeuing the enqueued task to the task queue associated with the thread, and executing the dequeued task.
    Type: Application
    Filed: August 22, 2012
    Publication date: March 7, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Kei Hamada, Kouichirou Amemiya, Yasushi Kurokawa, Yumiko Ogata, Eitatsu Yoshida
  • Patent number: 7778174
    Abstract: A shaper circuit includes a storage part storing a current token, an add token, and a max token, a subtraction part subtracting a packet length of a dequeue target from the current token stored in the storage part and storing the current token in the storage part, an addition part adding the add token stored in the storage part to the current token stored in the storage part at constant periodic intervals and storing the current token in the storage part, a comparison part comparing the result of the addition with the max token stored in the storage part and preventing the addition result from exceeding the max token, and a determining part outputting a dequeue permission request. A number of bits in a decimal part of the current token are set and a number of bits in an integer part of the add token are set.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: August 17, 2010
    Assignee: Fujtisu Limited
    Inventors: Yoko Ohta, Katsumi Imamura, Yasushi Kurokawa, Hideyo Fukunaga
  • Patent number: 7496034
    Abstract: A packet transmission device improved in packet transmission efficiency. Each packet input processor generates a pointer and identifies a packet type with respect to a received packet, and generates identification data including the pointer and the packet type identification result. A memory access controller detects a header readout amount of the packet based on the packet type identification result, generates first readout data including the header readout amount and a readout pointer indicative of a storage location of the packet in a shared memory, and adaptively reads out header data of the packet from the shared memory in accordance with the first readout data. A protocol processor analyzes the destination of the read header data, and a packet updater updates the old destination address of the packet to a new one to generate a packet with the updated destination address, and outputs the generated packet.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: February 24, 2009
    Assignee: Fujitsu Limited
    Inventors: Hideyo Fukunaga, Katsumi Imamura, Yasushi Kurokawa, Hideyuki Kudou, Yoko Watanabe
  • Publication number: 20070223375
    Abstract: A shaper circuit for controlling input packets using a token bucket algorithm is disclosed.
    Type: Application
    Filed: June 7, 2006
    Publication date: September 27, 2007
    Inventors: Yoko Ohta, Katsumi Imamura, Yasushi Kurokawa, Hideyo Fukunaga
  • Patent number: 7103043
    Abstract: The present invention is directed to the provision of a packet transmission apparatus and, more particularly, to a packet transmission apparatus achieving high-speed processing capability and enhanced relay quality for multicast packets. The packet transmission apparatus comprises: a non-copy packet arbiter which selects one of the non-copy packets by a prescribed algorithm, and requests transmission of the selected non-copy packet; a copy packet arbiter which selects one of the copy packets by a prescribed algorithm, and requests transmission of the selected copy packet; and a final arbiter which selects either one of the transmit requests, the transmit request from the non-copy packet arbiter or the transmit request from the copy packet arbiter, by a prescribed algorithm, and requests transmission of the selected packet, and wherein: the packet transmission apparatus transmits the packet requested by the final arbiter for transmission.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: September 5, 2006
    Assignee: Fujitsu Limited
    Inventors: Yasushi Kurokawa, Hideyo Fukunaga, Takashi Maemoto, Yuuki Okumura
  • Publication number: 20060098648
    Abstract: A packet transmission device improved in packet transmission efficiency. Each packet input processor generates a pointer and identifies a packet type with respect to a received packet, and generates identification data including the pointer and the packet type identification result. A memory access controller detects a header readout amount of the packet based on the packet type identification result, generates first readout data including the header readout amount and a readout pointer indicative of a storage location of the packet in a shared memory, and adaptively reads out header data of the packet from the shared memory in accordance with the first readout data. A protocol processor analyzes the destination of the read header data, and a packet updater updates the old destination address of the packet to a new one to generate a packet with the updated destination address, and outputs the generated packet.
    Type: Application
    Filed: March 11, 2005
    Publication date: May 11, 2006
    Inventors: Hideyo Fukunaga, Katsumi Imamura, Yasushi Kurokawa, Hideyuki Kudou, Yoko Watanabe
  • Patent number: 7027440
    Abstract: A router includes a plurality of control units connected in parallel, each having an input connected to a receiving interface and an output connected to a transmitting interface, and performing timing control of outgoing packets to the transmitting interface based on header information of incoming packets, the incoming packets being stored in a memory and the stored packets being transmitted to the transmitting interface in order of transmission of the outgoing packets. A distributing unit distributes transmitting sequence information, related to the stored packets in the memory, to other control units. The distributing unit determines whether a packet sequence inversion in the control unit occurs, based on a result of comparison of the transmitting sequence information received and the transmitting sequence information held by the control unit, inhibiting the transmission of the stored packets to the transmitting interface when the packet sequence invention is detected.
    Type: Grant
    Filed: March 25, 2002
    Date of Patent: April 11, 2006
    Assignee: Fujitsu Limited
    Inventors: Hideyuki Kudou, Yushi Murata, Yasushi Kurokawa
  • Publication number: 20030099232
    Abstract: A router includes a plurality of control units connected in parallel, each having an input connected to a receiving interface and an output connected to a transmitting interface, and performing timing control of outgoing packets to the transmitting interface based on header information of incoming packets, the incoming packets being stored in a memory and the stored packets being transmitted to the transmitting interface in order of transmission of the outgoing packets. A distributing unit distributes transmitting sequence information, related to the stored packets in the memory, to other control units. The distributing unit determines whether a packet sequence inversion in the control unit occurs, based on a result of comparison of the transmitting sequence information received and the transmitting sequence information held by the control unit, inhibiting the transmission of the stored packets to the transmitting interface when the packet sequence invention is detected.
    Type: Application
    Filed: March 25, 2002
    Publication date: May 29, 2003
    Inventors: Hideyuki Kudou, Yushi Murata, Yasushi Kurokawa
  • Publication number: 20030043840
    Abstract: The present invention is directed to the provision of a packet transmission apparatus and, more particularly, to a packet transmission apparatus achieving high-speed processing capability and enhanced relay quality for multicast packets. The packet transmission apparatus comprises: a non-copy packet arbiter which selects one of the non-copy packets by a prescribed algorithm, and requests transmission of the selected non-copy packet; a copy packet arbiter which selects one of the copy packets by a prescribed algorithm, and requests transmission of the selected copy packet; and a final arbiter which selects either one of the transmit requests, the transmit request from the non-copy packet arbiter or the transmit request from the copy packet arbiter, by a prescribed algorithm, and requests transmission of the selected packet, and wherein: the packet transmission apparatus transmits the packet requested by the final arbiter for transmission.
    Type: Application
    Filed: February 19, 2002
    Publication date: March 6, 2003
    Inventors: Yasushi Kurokawa, Hideyo Fukunaga, Takashi Maemoto, Yuuki Okumura
  • Patent number: 6377584
    Abstract: A transmission equipment decides in which, when a frame is received from each of networks, an output physical port corresponding to an output logical port decided by a path deciding section is decided by an output physical port deciding section, a transmitting frame is outputted to the output physical port, and when following received frames are successively transmitted, an output physical port number to which a transmitting frame is outputted by a port number increment section is incremented each time a frame is transmitted, and a destination to which a transmitting frame is outputted is switched among output physical ports.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: April 23, 2002
    Assignee: Fujitsu Limited
    Inventors: Shinya Kano, Akira Chugo, Takashi Sawada, Yasushi Kurokawa