Patents by Inventor Yasushi Matsui

Yasushi Matsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5338699
    Abstract: A method of making a semiconductor device including a plurality of gate electrodes (6a, 6b, 6c, 6d) arranged on the surface of a semiconductor substrate (1) with insulating layers (5, 8) covering the top and the side walls of the gate electrodes. The spaces between the opposing side walls of adjacent gate electrodes on the surface of the element isolation region (2) are smaller than twice the thickness of the thinnest insulating layer (8) among the insulating layers of the side walls of the gate electrodes on the surface of the active regions. The space (14) between the gate electrodes on the element isolation region is filled with the insulating isolation layer (8) so that unevenness in the underlying portion on the element isolation region on which the conductive interconnection layer (10) to be formed is reduced, preventing thinning of the conductive interconnection layer and disconnection due to excessive etching of a resist film in patterning the conductive interconnection layer.
    Type: Grant
    Filed: January 29, 1993
    Date of Patent: August 16, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Makoto Ohi, Hideaki Arima, Natsuo Ajika, Atsushi Hachisuka, Yasushi Matsui
  • Patent number: 5339325
    Abstract: A strained multiple quantum well semiconductor laser including a semiconductor substrate, a multiple quantum well active layer including a plurality quantum well layers and a plurality of barrier layers, and a multilayer structure including the above multiple quantum well active layer is provided. Each barrier layer is interposed between two of the multiple quantum well active layers. The multilayer structure is formed upon the semiconductor substrate. Herein, at least one of the plurality of barrier layers is thicker than the other barrier layers, thereby serving as a layer absorbing strain which is stored in the barrier layers due to a difference between the lattice constant of semiconductor substrate and the lattice constant each quantum well layer.
    Type: Grant
    Filed: August 4, 1993
    Date of Patent: August 16, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Kito, Yasushi Matsui
  • Patent number: 5319657
    Abstract: The semiconductor laser comprises a Sn doped InP substrate 1, n-InGaAsP wave guide layer 2, 5 nm thick InGaAs well layer 3, 3.5 nm thick undoped InGaAsP layer 4, 3 nm thick p-InGaAsP modulation doping layer 5, 3.5 nm thick undoped InGaAsP layer 6, a modulation doping quantum well layer 7 with ten wells, a 90 nm thick p-InGaAsP layer 8, a p-InP clad layer 9 (Zn=7.times.10.sup.17 cm.sup.-3), p-n-p current block layer 10, and a mesa-shaped active layer region 11. An Au/sn n-electrode 12 and if Au/Zn p-electrode 13 are formed by vapor deposition to complete the laser structure.
    Type: Grant
    Filed: October 8, 1992
    Date of Patent: June 7, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyuki Otsuka, Masahiro Kito, Masato Ishino, Yasushi Matsui
  • Patent number: 5308433
    Abstract: Herein disclosed is a vapor growth system, in which the number of dummy lines is reduced to decrease the number of lines led into a valve system, thereby enabling thin film growth having a good interfacial steepleness. The system comprising gas supplying lines A70, B71 and C72, which are made up of AsH.sub.3 process gas lines A62, B65, C68 and and balance lines A61, B64 and C67, respectively. The balance lines A61, B64 and C.sub.67 contributes equalization of products of the viscosity and the flow rate in the gas supplying lines A70, B71 and C72, and the dummy line 60. Only when AsH.sub.3 (A), AsH.sub.3 (B) and AsH.sub.3 gases are not fed upon formation of the film growth, the dummy line 60 is connected to the main line. Whereby, the system is free from pressure fluctuation of the gas in the main line, with an arrangement of even a single dummy line.
    Type: Grant
    Filed: April 9, 1992
    Date of Patent: May 3, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuyuki Otsuka, Yasushi Matsui
  • Patent number: 5240872
    Abstract: A semiconductor device includes a MOS type field effect transistor whose gate electrode (4) has its surface covered with a first insulating film (5) and left and right sides provided with a pair of second insulating films (10). A first conductive layer (12, 13) is formed on the surface of the source/drain region (8, 11) and the surface of one of a pair of second insulating films (10) which are positioned on one side of the gate electrode (4). A third insulating film (24b) is formed at least on the surface of the second insulating film (10) on which the first conductive layer (12, 13) is not formed. A second conductive layer (18) is provided on the surface of the third insulating film (24b) and on the source/drain region (8, 11) on which the third insulating film (24b) is formed. This structure enables provision of a semiconductor device in which a contact hole can be formed in self-alignment, independent from the influence of errors in the step of patterning a resist mask.
    Type: Grant
    Filed: August 6, 1992
    Date of Patent: August 31, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kaoru Motonami, Natsuo Ajika, Atsushi Hachisuka, Yoshinori Okumura, Yasushi Matsui
  • Patent number: 5233212
    Abstract: A semiconductor device includes a plurality of gate electrodes (6a, 6b, 6c, 6d) arranged on the surface of a semiconductor substrate (1) with insulating layers (5, 8) covering the top and the side walls of the gate electrodes. The spaces between the opposing side walls of adjacent gate electrodes on the surface of the element isolation region (2) re smaller than twice the thickness of the thinnest insulating layer (8) among the insulating layers of the side walls of the gate electrodes on the surface of the active regions. The space (14) between the gate electrodes on the element isolation region is filled with the insulating isolation layer (8) so that unevenness in the underlying portion on the element isolation region on which the conductive interconnection layer (10) to be formed is reduced, preventing thinning of the conductive interconnection layer and disconnection due to excessive etching of a resin film in patterning the conductive interconnection layer.
    Type: Grant
    Filed: April 25, 1991
    Date of Patent: August 3, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Makoto Ohi, Hideaki Arima, Natsuo Ajika, Atsushi Hachisuka, Yasushi Matsui
  • Patent number: 5229314
    Abstract: A field effect transistor and a method of manufacturing thereof are disclosed that is not reduced in the characteristic of withstanding voltage between multilayer interconnection layers even when scaled to a higher integration. This field effect transistor includes side walls 21a formed on both sides of a bit line 15 so that the bottom side end contacts the upper surface of side walls 20a of gate electrodes 4b and 4c. The thickness of an insulating film interposed between gate electrodes 4b and 4c and a base portion 11a forming a low electrode 11 of a capacitor is not reduced. The characteristic of withstanding voltage is not deteriorated between multilayer interconnection layers even when scaled to higher integration.
    Type: Grant
    Filed: August 6, 1992
    Date of Patent: July 20, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomonori Okudaira, Hideaki Arima, Makoto Ohi, Kaoru Motonami, Yasushi Matsui
  • Patent number: 5173752
    Abstract: A semiconductor device incloudes a MOS type field effect transistor whose gate electrode (4) has its surface covered with a first insulating film (5) and left and right sides provided with a pair of second insulating films (10). A first conductive layer (12, 13) is formed on the surface of the source/drain region (8, 11) and the surface of one of a pair of second insulating films (10) which are positioned on one side of the gate electrode (4). A third insulating film (24b) is formed at least on the surface of the second insulating film (10) on which the first conductive layer (12, 13) is not formed. A second conductive layer (18) is provided on the surface of the third insulating film (24b) and on the source/drain region (8, 11) on which the third insulating film (24b) is formed. This structure enables provision of a semiconductor device in which a contact hole can be formed in self-alignment, independent from the influence of errors in the step of patterning a resist mask.
    Type: Grant
    Filed: April 26, 1991
    Date of Patent: December 22, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kaoru Motonami, Natsuo Ajika, Atsushi Hachisuka, Yoshinori Okumura, Yasushi Matsui
  • Patent number: 5157469
    Abstract: A field effect transistor and a method of manufacturing thereof are disclosed that is not reduced in the characteristic of withstanding voltage between multilayer interconnection layers even when scaled to a higher integration. This field effect transistor includes side walls 21a formed on both sides of a bit line 15 so that the bottom side end contacts the upper surface of side walls 20a of gate electrodes 4b and 4c. The thickness of an insulating film interposed between gate electrodes 4b and 4c and a base portion 11a forming a low electrode 11 of a capacitor is not reduced. The characteristic of withstanding voltage is not deteriorated between multilayer interconnection layers even when scaled to higher integration.
    Type: Grant
    Filed: April 16, 1991
    Date of Patent: October 20, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tomonori Okudaira, Hideaki Arima, Makoto Ohi, Kaoru Motonami, Yasushi Matsui
  • Patent number: 5116739
    Abstract: The invention provides DNA fragments coding for human apolipoprotein E or human apolipoprotein E-like substances having physiological activities equivalent to those of said human apolipoprotein E, expression vectors suitable for production of such proteins, hosts for use in the production, and process for the production, as well as such proteins thereby produced.
    Type: Grant
    Filed: December 22, 1988
    Date of Patent: May 26, 1992
    Assignee: Mitsubishi Chemical Industries Limited
    Inventors: Yutaka Teranishi, Nobuhiko Takamatsu, Yasushi Matsui, Masako Kimura, Yasuko Ikeda, Yuuki Morimoto
  • Patent number: 5039553
    Abstract: A process for the continuous production of cobalt-modified magnetic iron oxide. This process comprises carrying out a batchwise preliminary cobalt treatment by adding a magnetic iron oxide powder to an alkaline solution followed by the addition of a cobalt salt to cover the magnetic iron oxide powder with cobalt. A cobalt modification reaction is carried out continuously by passing the solution containing the preliminary cobalt-treated magnetic iron oxide powder under heat and pressure through a flow-type reaction vessel.
    Type: Grant
    Filed: April 3, 1990
    Date of Patent: August 13, 1991
    Assignee: Showa Denko K.K.
    Inventors: Yuji Fukumoto, Kazuyoshi Matsumoto, Yasushi Matsui
  • Patent number: 4843609
    Abstract: Disclosed is an optical integrated circuit for heterodyne detection. The optical integrated circuit comprises: a semiconductor substrate; an active region of a semiconductor laser; two optical waveguides; a photo detector; and an optical coupler composed of the waveguides. The emission of light from the active region of the semiconductor laser is synthesized as local oscillation light with the transmission light. The synthesized light travels through the optical coupler and is detected by the photo detector.
    Type: Grant
    Filed: December 28, 1987
    Date of Patent: June 27, 1989
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Jun Ohya, Yasushi Matsui
  • Patent number: 4748017
    Abstract: Lepidocrocite suitable for obtaining excellent magnetic powders and magnetic recording media is manufactured by oxidizing an aqueous suspension of ferrous hydroxide obtained from a ferrous salt and an alkali by blowing an amount of an oxygen-containing gas into the suspension, in which the blowing amount of the oxygen-containing gas is appropriately controlled in three steps, according to three steps of the oxidation reaction of the ferrous hydroxide. In a preferred embodiment, average oxygen absorption rates in the three oxidization steps are defined and the blowing of the oxygen-containing gas is controlled thereby.
    Type: Grant
    Filed: January 20, 1987
    Date of Patent: May 31, 1988
    Assignee: Showa Denko Kabushiki Kaisha
    Inventors: Yasushi Matsui, Toshinori Kamisaka, Takahiko Goto, Kenichi Okazaki, Norio Koike
  • Patent number: 4729846
    Abstract: Lepidocrocite (.gamma.-FeOOH) with an large specific surface area and a uniform particle size is provided by a method comprising preparing a suspension of ferrous hydroxide at a pH of 6.5 to 7.5 by adding a ferrous salt solution with an alkali solution in an amount of 0.4 to 0.7 times the theoretical amount for converting all the ferrous salt to ferrous hydroxide, blowing an oxygen-containing gas into the suspension to form a seed crystal of .gamma.-FeOOH, completing the generation reaction of .gamma.-FeOOH by blowing an oxygen-containing gas into the suspension while adding an alkali solution to keep the pH of the suspension within a range of 3 to 5, in which an Si concentration of the suspensions for seed reaction and for generation reaction of .gamma.-FeOOH is controlled to be within 5 to 30 ppm.
    Type: Grant
    Filed: January 20, 1987
    Date of Patent: March 8, 1988
    Assignee: Showa Denko Kabushiki Kaisha
    Inventors: Yasushi Matsui, Norio Koike, Kunio Takahashi, Hiroshi Matsue
  • Patent number: 4129617
    Abstract: A novel graft copolymer and a process for the production thereof is disclosed, said graft copolymer comprising a backbone chain of a fluoropolymer and side chains grafted thereon consisting essentially of at least a member selected from the group consisting of acyloxystyrene, diacyloxystyrene, hydroxystyrene and dihydroxystyrene or consisting essentially of a mixture of at least a member selected from the group mentioned above and a polyene compound. The grafting is conveniently carried out with the aid of an ionizing radiation. The novel graft copolymer has a wide variety of uses due to its improved characteristic properties such as, for example, improved adhesion properties, improved dyeing properties, improved reactivity to other compounds and the like.
    Type: Grant
    Filed: November 7, 1977
    Date of Patent: December 12, 1978
    Assignees: Japan Atomic Energy Research Institute, Maruzen Oil Company Limited
    Inventors: Sueo Machi, Yasushi Matsui, Akio Sugishita, Takanobu Sugo, Hiroaki Taniguchi, Koichi Asano, Hiroshi Fujiwara