Patents by Inventor Yasushi Nanishi

Yasushi Nanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Gallium oxide single crystal composite, process for producing the same, and process for producing nitride semiconductor film utilizing gallium oxide single crystal composite
    Publication number: 20090072239
    Abstract: Provided are: a gallium oxide single crystal composite, which can provide, for example, upon a crystal growth of a nitride semiconductor, a high-quality cubic crystal in which mixing of a hexagonal crystal is reduced to thereby realize dominant growth of a cubic crystal over hexagonal crystal, and which can be utilized as a substrate particularly suitable for epitaxial growth of cubic GaN; a process for producing the same; and a process for producing a nitride semiconductor film.
    Type: Application
    Filed: May 11, 2005
    Publication date: March 19, 2009
    Inventors: Shigeo Oohira, Yasushi Nanishi, Tsutomu Araki, Tomohiro Yamaguchi
  • Semiconductor light emitting device and method for adjusting the luminous intensity thereof
    Patent number: 6593596
    Abstract: A semiconductor light emitting device includes: a substrate; a ZnO buffer layer formed on the substrate; and a GaN-based light emitting layer formed on the ZnO buffer layer. The ZnO buffer layer has an average crystalline grain size of ZnO grains of about 0.45 &mgr;m or more, or 0.12 &mgr;m or less.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: July 15, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yasushi Nanishi, Michio Kadota
  • Opto-electronic integrated circuit
    Patent number: 6458614
    Abstract: An optical electronic integrated circuit comprises: a silicon substrate; an electronic circuit formed in the silicon substrate and processing an electric signal; a ZnO film formed on at least portion of the silicon substrate; and an optical circuit electrically connected to the electronic circuit. The optical circuit includes at least one GaN-based semiconductor compound layer which is provided on the ZnO film, and the GaN-based compound semiconductor layer either receives or emits an optical signal.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: October 1, 2002
    Assignee: Murata Manufacturing Co.,
    Inventors: Yasushi Nanishi, Michio Kadota
  • Semiconductor light emitting device having a GaN-based semiconductor layer, method for producing the same and method for forming a GaN-based semiconductor layer
    Patent number: 6362496
    Abstract: A method for forming a GaN-based semiconductor layer includes the steps of: forming a ZnO buffer layer on one of a glass substrate and a silicon substrate; and epitaxially growing a GaN-based semiconductor layer on the ZnO buffer layer by using an electron cyclotron resonance-molecular beam-epitaxy (ECR-MBE) method.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: March 26, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yasushi Nanishi, Michio Kadota
  • Method for forming a GaN-based semiconductor light emitting device
    Patent number: 6146916
    Abstract: A method for forming a GaN-based semiconductor layer includes the steps of: forming a ZnO buffer layer on one of a glass substrate and a silicon substrate; and epitaxially growing a GaN-based semiconductor layer on the ZnO buffer layer by using an electron cyclotron resonance--molecular beam epitaxy (ECR-MBE) method.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: November 14, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yasushi Nanishi, Michio Kadota
  • Process for manufacturing boron-doped gallium arsenide single crystal
    Patent number: 4528061
    Abstract: A process for manufacturing boron-doped GaAs single crystals which comprises preparing a mixture of boron, gallium and arsenic covered by a liquid B.sub.2 O.sub.3 encapsulant, melting the mixture, pulling up boron-doped GaAs crystals from the mixture melts in accordance with the LEC method, crushing those crystals into small pieces after removing the seed end therefrom, remelting those pieces in the presence of B.sub.2 O.sub.3, and pulling up single crystals from the mixture melts in accordance with the LEC method.
    Type: Grant
    Filed: April 15, 1983
    Date of Patent: July 9, 1985
    Assignees: Nippon Telegraph & Telephone Public Corporation, Sumitomo Electric Industries, Ltd.
    Inventors: Shintaro Miyazawa, Yasushi Nanishi, Kohji Tada, Akihisa Kawasaki, Toshihiro Kotani