Abstract: A semiconductor device includes a semiconductor element, a sealing material, and an extension wire. The semiconductor element has, on a front surface, a first electrode pad and at least one second electrode pad, and generates a current in a direction connecting the front surface and a back surface. The sealing material is made of an insulating resin material and covers a part of the front surface and a side surface of the semiconductor element. The extension wire is disposed above the semiconductor element and inside the sealing material or on the sealing material. The extension wire is electrically connected to the second electrode pad, and extends from a position inside of a contour of the semiconductor element to a position outside of the contour of the semiconductor element.

Abstract: A semiconductor device includes a semiconductor element, a sealing member, and a rewiring layer. The rewiring layer includes an insulating layer covering a front surface of the semiconductor element and a part of the sealing member, an electrode connected to the semiconductor element, and an externally-exposed layer being conductive and covering a portion of the electrode exposed from the insulating layer.

Abstract: A semiconductor device includes a semiconductor substrate on which plural gate electrodes are juxtaposed to each other, plural gate wirings formed on the semiconductor substrate, plural gate pads, a first pad, and a second pad. The adjacent gate electrodes define plural cells, and the plural cells include plural transistor cells. The plural gate electrodes are partitioned into plural types by the plural gate wirings. The plural transistor cells are partitioned into plural types according to a combination of the defined gate electrodes.

Abstract: A semiconductor device includes: a semiconductor substrate having an element; a front surface electrode connected to the element; a rear surface electrode connected to the element; a protective film disposed on the front surface of the semiconductor substrate in a separation region; and a temperature sensor disposed on a front surface side of the semiconductor substrate. The front surface electrode is divided into multiple pieces along at least two directions with the protective film. The separation region includes an opposing region located between opposing sides of divided pieces of the front surface electrode adjacent to each other, and an intersection region, at which the opposing region intersects. The temperature sensor is disposed in only the opposing region.

Abstract: A semiconductor device includes: a semiconductor element having a solder region and a non-solder region on a first face; a first metal member disposed on the first face of the semiconductor element; a second metal member disposed on a rear face of the semiconductor element; a first solder that connects the solder region of the semiconductor element and the first metal member; and a second solder that connects the rear face of the semiconductor element and the second metal member. At least the second solder provides a melt-bond. A gravity center position of the first metal member coincides with a center position of the semiconductor element in a projection view from a stacking direction.

Abstract: A semiconductor device includes: a semiconductor element having a solder region and a non-solder region on a first face; a first metal member disposed on the first face of the semiconductor element; a second metal member disposed on a rear face of the semiconductor element; a first solder that connects the solder region of the semiconductor element and the first metal member; and a second solder that connects the rear face of the semiconductor element and the second metal member. At least the second solder provides a melt-bond. A gravity center position of the first metal member coincides with a center position of the semiconductor element in a projection view from a stacking direction.

Abstract: A semiconductor device includes: a semiconductor substrate having an element; a front surface electrode connected to the element; a rear surface electrode connected to the element; a protective film disposed on the front surface of the semiconductor substrate in a separation region; and a temperature sensor disposed on a front surface side of the semiconductor substrate. The front surface electrode is divided into multiple pieces along at least two directions with the protective film. The separation region includes an opposing region located between opposing sides of divided pieces of the front surface electrode adjacent to each other, and an intersection region, at which the opposing region intersects. The temperature sensor is disposed in only the opposing region.

Abstract: A semiconductor device includes a semiconductor substrate on which plural gate electrodes are juxtaposed to each other, plural gate wirings formed on the semiconductor substrate, plural gate pads, a first pad, and a second pad. The adjacent gate electrodes define plural cells, and the plural cells include plural transistor cells. The plural gate electrodes are partitioned into plural types by the plural gate wirings. The plural transistor cells are partitioned into plural types according to a combination of the defined gate electrodes.

Abstract: There is known a semiconductor device in which an IGBT structure is provided in an IGBT area and a diode structure is provided in a diode area, the IGBT area and the diode area are both located within a same substrate, and the IGBT area is adjacent to the diode area. In this type of semiconductor device, a phenomenon that carriers accumulated within the IGBT area flow into the diode area when the IGBT structure is turned off. In order to prevent this phenomenon, a region of shortening lifetime of carriers is provided at least in a sub-area that is within said IGBT area and adjacent to said diode area. In the sub-area, emitter of IGBT structure is omitted.

Abstract: In a semiconductor device, an IGBT cell includes a trench passing through a base layer of a semiconductor substrate to a drift layer of the semiconductor substrate, a gate insulating film on an inner surface of the trench, a gate electrode on the gate insulating film, a first conductivity-type emitter region in a surface portion of the base layer, and a second conductivity-type first contact region in the surface portion of the base layer. The IGBT cell further includes a first conductivity-type floating layer disposed within the base layer to separate the base layer into a first portion including the emitter region and the first contact region and a second portion adjacent to the drift layer, and an interlayer insulating film disposed to cover an end of the gate electrode. A diode cell includes a second conductivity-type second contact region in the surface portion of the base layer.

Abstract: In a semiconductor module, a first heat sink is disposed on a rear surface of a first semiconductor chip constituting an upper arm, and a second heat sink is disposed on a front surface of the first semiconductor chip through a first terminal. A third heat sink is disposed on a rear surface of a second semiconductor chip constituting a lower arm, and a fourth heat sink is disposed on a front surface of the second semiconductor chip through a second terminal. A connecting part for connecting between the upper arm and the lower arm is integral with the first terminal, and is connected to the third heat sink while being inclined relative to the first terminal.

Abstract: A semiconductor device includes a semiconductor element, a first heat sink, a second heat sink, and a resin member. The semiconductor element has first and second surfaces. The first heat sink has a first heat radiation surface and a first end surface. The first end surface is coupled with the first surface. The second heat sink has a second heat radiation surface, the second end surface being opposite the second heat radiation surface, and a depressed section depressed toward the second heat radiation surface. The second surface of the semiconductor element is coupled with a bottom surface of the depressed section. The resin member is disposed in the depressed section and seals the semiconductor element, the first heat sink, and the second heat sink in such a manner that the first heat radiation surface is exposed outside the resin member.

Abstract: In a semiconductor device, an IGBT cell includes a trench passing through a base layer of a semiconductor substrate to a drift layer of the semiconductor substrate, a gate insulating film on an inner surface of the trench, a gate electrode on the gate insulating film, a first conductivity-type emitter region in a surface portion of the base layer, and a second conductivity-type first contact region in the surface portion of the base layer. The IGBT cell further includes a first conductivity-type floating layer disposed within the base layer to separate the base layer into a first portion including the emitter region and the first contact region and a second portion adjacent to the drift layer, and an interlayer insulating film disposed to cover an end of the gate electrode. A diode cell includes a second conductivity-type second contact region in the surface portion of the base layer.

Abstract: There is known a semiconductor device in which an IGBT structure is provided in an IGBT area and a diode structure is provided in a diode area, the IGBT area and the diode area are both located within a same substrate, and the IGBT area is adjacent to the diode area. In this type of semiconductor device, a phenomenon that carriers accumulated within the IGBT area flow into the diode area when the IGBT structure is turned off. In order to prevent this phenomenon, a region of shortening lifetime of carriers is provided at least in a sub-area that is within said IGBT area and adjacent to said diode area. In the sub-area, emitter of IGBT structure is omitted.

Abstract: In a semiconductor module, a first heat sink is disposed on a rear surface of a first semiconductor chip constituting an upper arm, and a second heat sink is disposed on a front surface of the first semiconductor chip through a first terminal. A third heat sink is disposed on a rear surface of a second semiconductor chip constituting a lower arm, and a fourth heat sink is disposed on a front surface of the second semiconductor chip through a second terminal. A connecting part for connecting between the upper arm and the lower arm is integral with the first terminal, and is connected to the third heat sink while being inclined relative to the first terminal.

Abstract: A semiconductor device includes a semiconductor element, a first heat sink, a second heat sink, and a resin member. The semiconductor element has first and second surfaces. The first heat sink has a first heat radiation surface and a first end surface. The first end surface is coupled with the first surface. The second heat sink has a second heat radiation surface, the second end surface being opposite the second heat radiation surface, and a depressed section depressed toward the second heat radiation surface. The second surface of the semiconductor element is coupled with a bottom surface of the depressed section. The resin member is disposed in the depressed section and seals the semiconductor element, the first heat sink, and the second heat sink in such a manner that the first heat radiation surface is exposed outside the resin member.

Abstract: A semiconductor device includes a semiconductor chip that generates heat in operation, a pair of heat sinks for cooling the chip, and a mold resin, in which the chip and the heat sinks are embedded. The thickness t1 of the chip and the thickness t2 of one of heat sinks that is joined to the chip using a solder satisfy the equation of t2/t1?5. Furthermore, the thermal expansion coefficient ?1 of the heat sinks and the thermal expansion coefficient ?2 of the mold resin satisfy the equation of 0.5??2/?1?1.5. In addition, the surface of the chip that faces the solder has a roughness Ra that satisfies the equation of Ra?500 nm. Moreover, the solder is a Sn-based solder to suppress relaxation of a compressive stress in the chip, which is caused by the creeping of the solder.

Abstract: A semiconductor device includes a semiconductor chip that generates heat in operation, a pair of heat sinks for cooling the chip, and a mold resin, in which the chip and the heat sinks are embedded. The thickness t1 of the chip and the thickness t2 of one of heat sinks that is joined to the chip using a solder satisfy the equation of t2/t1≧5. Furthermore, the thermal expansion coefficient &agr;1 of the heat sinks and the thermal expansion coefficient &agr;2 of the mold resin satisfy the equation of 0.5≦&agr;2/&agr;1≦1.5. In addition, the surface of the chip that faces the solder has a roughness Ra that satisfies the equation of Ra≦500 nm. Moreover, the solder is a Sn-based solder to suppress relaxation of a compressive stress in the chip, which is caused by the creeping of the solder.