Patents by Inventor Yasushi Seino

Yasushi Seino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170302389
    Abstract: A wireless communication device includes: a transmitting circuit that is connected to an antenna and includes a power amplifier that amplifies an input signal; a receiving circuit that is connected to the antenna and includes a switch that switches as to whether or not a signal is received; and a processor that executes a process including: acquiring timing information that indicates timing of a guard period when no signal is transmitted or received by the antenna; turning on the power amplifier and turning on the switch in the guard period based on the acquired timing information to input a noise signal of the transmitting circuit that is amplified by the power amplifier to the receiving circuit; measuring electrical power of a signal that is output from the receiving circuit in the guard period; and determining abnormality of the receiving circuit based on the measured electrical power.
    Type: Application
    Filed: March 24, 2017
    Publication date: October 19, 2017
    Applicant: FUJITSU LIMITED
    Inventors: HIRO YOSHIDA, Junya MORITA, Takuro Nishikawa, Takeshi OHBA, Akifumi Adachi, Shinichiro Kobayashi, Satoshi Matsubara, Yasushi Seino, Kouichi Hayasaka, Shunsuke Satou
  • Patent number: 9559732
    Abstract: A wireless apparatus including: an amplification circuit configured to generate a second signal by amplifying power of a first signal, a calculation circuit configured to calculate a deviation amount of phase deviation of the second signal from the first signal, and a correction circuit configured to correct the phase deviation using a correction method that is selected from a plurality of correction methods based on the deviation amount, the plurality of correction methods among which each power consumption is higher as each correction amount corresponding to each power consumption is greater.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: January 31, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Yoshinobu Shizawa, Hirotoshi Kanno, Yasushi Seino, Junya Morita, Tsuneaki Tadano
  • Publication number: 20160301432
    Abstract: A wireless apparatus including: an amplification circuit configured to generate a second signal by amplifying power of a first signal, a calculation circuit configured to calculate a deviation amount of phase deviation of the second signal from the first signal, and a correction circuit configured to correct the phase deviation using a correction method that is selected from a plurality of correction methods based on the deviation amount, the plurality of correction methods among which each power consumption is higher as each correction amount corresponding to each power consumption is greater.
    Type: Application
    Filed: March 14, 2016
    Publication date: October 13, 2016
    Inventors: Yoshinobu SHIZAWA, Hirotoshi KANNO, Yasushi SEINO, Junya MORITA, Tsuneaki TADANO
  • Patent number: 8145152
    Abstract: A gain temperature compensation circuit producing a relatively small loss of power, and enabling modification of a variation width of the attenuation amount in a predetermined temperature range is provided. A gain temperature compensation circuit includes a circulator and a thermistor. The circulator outputs a signal being input to a first port to a second port, and outputs the signal being input to the second port to a third port. The thermistor being connected to the second port reflects the signal being output from the second port by varying the power of the signal according to temperature, so as to input to the second port, in order to adjust the attenuation amount of the signal.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: March 27, 2012
    Assignee: Fujitsu Limited
    Inventors: Kiyotaka Takahashi, Yasushi Seino
  • Publication number: 20090291651
    Abstract: A gain temperature compensation circuit producing a relatively small loss of power, and enabling modification of a variation width of the attenuation amount in a predetermined temperature range is provided. A gain temperature compensation circuit includes a circulator and a thermistor. The circulator outputs a signal being input to a first port to a second port, and outputs the signal being input to the second port to a third port. The thermistor being connected to the second port reflects the signal being output from the second port by varying the power of the signal according to temperature, so as to input to the second port, in order to adjust the attenuation amount of the signal.
    Type: Application
    Filed: December 23, 2008
    Publication date: November 26, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Kiyotaka Takahashi, Yasushi Seino
  • Patent number: 7456688
    Abstract: To cancel a reflected wave reflected from a connecting portion (22) and leaking into a feedback signal when a non-matched component is connected, the reflected wave is extracted by a circulator (30) and its phase and amplitude are adjusted by a vector adjusting circuit (32), and then the thus adjusted reflected wave is vector-summed with the feedback signal in a vector sum circuit (34).
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: November 25, 2008
    Assignee: Fujitsu Limited
    Inventors: Yousuke Okazaki, Hiroaki Maeda, Yasushi Seino, Takashi Ono
  • Publication number: 20070241816
    Abstract: To cancel a reflected wave reflected from a connecting portion (22) and leaking into a feedback signal when a non-matched component is connected, the reflected wave is extracted by a circulator (30) and its phase and amplitude are adjusted by a vector adjusting circuit (32), and then the thus adjusted reflected wave is vector-summed with the feedback signal in a vector sum circuit (34).
    Type: Application
    Filed: May 30, 2007
    Publication date: October 18, 2007
    Inventors: Yousuke Okazaki, Hiroaki Maeda, Yasushi Seino, Takashi Ono
  • Publication number: 20020017955
    Abstract: A phase correction amplifier according to the present invention includes; a GaAs field effect transistor; and a Si field effect transistor or a Si bipolar transistor; wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other through a variable attenuator.
    Type: Application
    Filed: September 28, 2001
    Publication date: February 14, 2002
    Inventor: Yasushi Seino
  • Patent number: 6313702
    Abstract: A phase correction amplifier according to the present invention includes; a GaAs field effect transistor; and a Si field effect transistor or a Si bipolar transistor; wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other through a variable attenuator.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: November 6, 2001
    Assignee: Fujitsu Limited
    Inventor: Yasushi Seino
  • Patent number: 6148185
    Abstract: The present invention relates to a feed-forward amplifying device suitable for radio communication systems such as digital automobile telephone.
    Type: Grant
    Filed: January 31, 1996
    Date of Patent: November 14, 2000
    Assignee: Fujitsu Limited
    Inventors: Satoshi Maruyama, Tokihiro Miyo, Fumihiko Kobayashi, Tatsuo Furukawa, Norio Tazawa, Yasushi Seino