Abstract: A SiC single crystal seed of the present invention has a main surface with an offset angle of at least 2° but not more than 20° relative to the {0001} plane, and at least one sub-growth surface, wherein the sub-growth surface includes an initial facet formation surface that is on the offset upstream side of the main surface and has an inclination angle ? relative to the {0001} plane with an absolute value of less than 2° in any direction, and the initial facet formation surface has a screw dislocation starting point.

Abstract: A semiconductor device includes a semiconductor substrate configured such that a trench is provided on a surface of the semiconductor substrate at a position of at least one of a boundary region disposed between a field-effect transistor region and a diode region, a boundary region disposed between the diode region and a peripheral voltage withstanding region, and a boundary region disposed between the field-effect transistor region and the peripheral voltage withstanding region; an insulating film covering an inner surface of the trench; and an electrode film covering an inner surface of the insulating film, the electrode film being configured to be electrically connected to one of a source electrode and an anode electrode.

Abstract: A switching device may include a semiconductor substrate; gate trenches; bottom insulating layers covering bottom surfaces of the gate trenches; gate insulating layers covering side surfaces of the gate trenches; and gate electrodes arranged in the gate trenches. The gate insulating layers in a center portion may have a first thickness and a first dielectric constant, and one or more of the gate insulating layers in a peripheral portion may have, within at least a part of the peripheral portion, a second thickness thicker than the first thickness and a second dielectric constant greater than the first dielectric constant. The semiconductor substrate may include a first region being in contact with the gate insulating layers, a body region being in contact with the gate insulating layers under the first region, and a second region being in contact with the gate insulating layers under the body region.

Abstract: A switching device may be provided with: a semiconductor substrate; a trench provided in an upper surface of the semiconductor substrate; a gate insulating layer covering an inner surface of the trench; and a gate electrode located in the trench. The semiconductor substrate includes: a first semiconductor region being in contact with the gate insulating layer; a body region being in contact with the gate insulating layer under the first semiconductor region; a second semiconductor region being in contact with the gate insulating layer under the body region; a bottom region being in contact with the gate insulating layer at a bottom surface of the trench; and a connection region being in contact with the gate insulating layer at a lateral surface of the trench and connecting the body region and the bottom region. The connection region is thicker than the bottom region.

Abstract: A switching device includes a semiconductor substrate; first and second trenches; gate insulating layers; and gate electrodes. The semiconductor substrate includes a first semiconductor region of a first conductivity type, a body region of a second conductivity type, a second semiconductor region of the first conductivity type, first and second bottom semiconductor regions of the second conductivity type disposed in areas extending to bottom surfaces of the first and second trenches, and a connection semiconductor region of the second conductivity type extending from the first trench to reach the second trench in a depth range from a depth of a lower end of the body region to a depth of the bottom surfaces of the first and second trenches, the connection semiconductor region contacting the second semiconductor region, and being connected to the body region, and the first and second bottom semiconductor regions.

Abstract: A semiconductor device may include an element region and a peripheral voltage withstanding region. The peripheral voltage withstanding region includes inner circumferential guard rings; and outer circumferential guard rings having a width narrower than a width of the inner circumferential guard rings. An interval between the inner circumferential guard rings is narrower than an interval between the outer circumferential guard rings. Each of the inner circumferential guard rings includes a first high concentration region and a first low concentration region. Each of the outer circumferential guard rings includes a second high concentration region and a second low concentration region. A width of a part of each first low concentration region that is exposed on a front surface of the semiconductor device is wider than a width of a part of each second low concentration region that is exposed on the front surface.

Abstract: A seed crystal for SiC single-crystal growth includes a facet formation region containing a {0001}-plane uppermost portion and n (n>=3) planes provided enclosing the periphery of the facet formation region. The seed crystal for SiC single-crystal growth satisfies the relationships represented by formula (a): Bkk-1<=cos?1(sin(2.3 degrees)/sin Ck), formula (b): Bkk<=cos?1(sin(2.3 degrees)/sin Ck), and formula (c): min(Ck)<=20 degrees. In the formulas, Ck is an offset angle of a k-th plane, Bkk-1 is an angle defined by an offset downstream direction of the k-th plane and a (k?1)-th ridge line, and Bkk is an angle defined by the offset downstream direction of the k-th plane and a k-th ridge line.

Abstract: A SiC single crystal includes, in a plane substantially parallel to a c-plane thereof, a region (A) in which edge dislocations having a Burgers vector (A) in a specific direction are unevenly distributed, and a region (B) in which basal plane dislocations having a Burgers vector (B) in a specific direction are unevenly distributed. The region (A) is located in a <1-100> direction with respect to a facet portion, while the region (B) is located in a <11-20> direction with respect to the facet portion. A SiC substrate is produced by cutting a SiC wafer from the SiC single crystal in a direction substantially parallel to the c-plane, and cutting the SiC substrate from the SiC wafer such that the SiC substrate mainly contains one of the region (A) and the region (B). A SiC device is fabricated using the SiC substrate.

Abstract: An SiC single crystal having at least one orientation region where a basal plane dislocation has a high linearity and is oriented to three crystallographically-equivalent <11-20> directions, and an SiC wafer and a semiconductor device which are manufactured from the SiC single crystal. The SiC single crystal can be manufactured by using a seed crystal in which the offset angle on a {0001} plane uppermost part side is small and the offset angle on an offset direction downstream side is large and growing another crystal on the seed crystal.

Abstract: A seed crystal for SiC single-crystal growth includes a facet formation region containing a {0001}-plane uppermost portion and n (n>=3) planes provided enclosing the periphery of the facet formation region. The seed crystal for SiC single-crystal growth satisfies the relationships represented by formula (a): Bkk-1<=cos?1(sin(2.3 degrees)/sin Ck), formula (b): Bkk<=cos?1(sin(2.3 degrees)/sin Ck), and formula (c): min(Ck)<=20 degrees. In the formulas, Ck is an offset angle of a k-th plane, Bkk-1 is an angle defined by an offset downstream direction of the k-th plane and a (k?1)-th ridge line, and Bkk is an angle defined by the offset downstream direction of the k-th plane and a k-th ridge line.

Abstract: In a manufacturing method of a silicon carbide single crystal, a seed crystal made of silicon carbide is prepared. The seed crystal has a growth surface and a stacking fault generation region and includes a threading dislocation that reaches the growth surface. The growth surface is inclined at a predetermined angle from a (0001) plane. The stacking fault generation region is configured to cause a stacking fault in the silicon carbide single crystal when the silicon carbide single crystal is grown. The stacking fault generation region is located at an end portion of the growth surface in an offset direction that is a direction of a vector defined by projecting a normal vector of the (0001) plane onto the growth surface. The seed crystal is joined to a pedestal, and the silicon carbide single crystal is grown on the growth surface of the seed crystal.

Abstract: When an SiC single crystal having a large diameter of a {0001} plane is produced by repeating a-plane growth, the a-plane growth of the SiC single crystal is carried out so that a ratio Sfacet (=S1×100/S2) of an area (S1) of a Si-plane side facet region to a total area (S2) of the growth plane is maintained at 20% or less.

Abstract: A manufacturing method of a SiC single crystal includes a first growth process and a re-growth process. In the first growth process, a first seed crystal made of SiC is used to grow a first SiC single crystal. In the re-growth process, a plurality of growth steps is performed for (n?1) times. In a k-th growth step, a k-th seed crystal is cut out from a grown (k?1)-th SiC single crystal, and the k-th seed crystal is used to grow a k-th SiC single crystal (n?2 and 2?k?n). When an offset angle of a growth surface of the k-th seed crystal is defined as ?k, at least in one of the plurality of growth steps, the offset angle ?k is smaller than the offset angle ?k-1.

Abstract: An SiC single crystal includes a low dislocation density region (A) where the density of dislocations each of which has a Burgers vector in a {0001} in-plane direction (mainly a direction parallel to a <11-20> direction) is not more than 3,700 cm/cm3. Such an SiC single crystal is obtained by: cutting out a c-plane growth seed crystal of a high offset angle from an a-plane grown crystal; applying c-plane growth so that the density of screw dislocations introduced into a c-plane facet may fall in a prescribed range; cutting out a c-plane growth crystal of a low offset angle from the obtained c-plane grown crystal; and applying c-plane growth so that the density of screw dislocations introduced into a c-plane facet may fall in a prescribed range. An SiC wafer and a semiconductor device are obtained from such an SiC single crystal.

Abstract: A manufacturing method of a SiC single crystal includes growing a SiC single crystal on a surface of a SiC seed crystal, which satisfies following conditions: (i) the SiC seed crystal includes a main growth surface composed of a plurality of sub-growth surfaces; (ii) among directions from an uppermost portion of a {0001} plane on the main growth surface to portions on a periphery of the main growth surface, the SiC seed crystal has a main direction in which a plurality of sub-growth surfaces is arranged; and (iii) an offset angle ?k of a k-th sub-growth surface and an offset angle ?k+1 of a (k+1)-th sub-growth surface satisfy a relationship of ?k<?k+1.

Abstract: An SiC single crystal includes a low dislocation density region (A) where the density of dislocations each of which has a Burgers vector in a {0001} in-plane direction (mainly a direction parallel to a <11-20> direction) is not more than 3,700 cm/cm3. Such an SiC single crystal is obtained by: cutting out a c-plane growth seed crystal of a high offset angle from an a-plane grown crystal; applying c-plane growth so that the density of screw dislocations introduced into a c-plane facet may fall in a prescribed range; cutting out a c-plane growth crystal of a low offset angle from the obtained c-plane grown crystal; and applying c-plane growth so that the density of screw dislocations introduced into a c-plane facet may fall in a prescribed range. An SiC wafer and a semiconductor device are obtained from such an SiC single crystal.

Abstract: When an SiC single crystal having a large diameter of a {0001} plane is produced by repeating a-plane growth, the a-plane growth of the SiC single crystal is carried out so that a ratio Sfacet (=S1×100/S2) of an area (S1) of a Si-plane side facet region to a total area (S2) of the growth plane is maintained at 20% or less.

Abstract: An SiC single crystal having at least one orientation region where a basal plane dislocation has a high linearity and is oriented to three crystallographically-equivalent <11-20> directions, and an SiC wafer and a semiconductor device which are manufactured from the SiC single crystal. The SiC single crystal can be manufactured by using a seed crystal in which the offset angle on a {0001} plane uppermost part side is small and the offset angle on an offset direction downstream side is large and growing another crystal on the seed crystal.

Abstract: A manufacturing method of a SiC single crystal includes a first growth process and a re-growth process. In the first growth process, a first seed crystal made of SiC is used to grow a first SiC single crystal. In the re-growth process, a plurality of growth steps is performed for (n?1) times. In a k-th growth step, a k-th seed crystal is cut out from a grown (k?1)-th SiC single crystal, and the k-th seed crystal is used to grow a k-th SiC single crystal (n?2 and 2?k?n). When an offset angle of a growth surface of the k-th seed crystal is defined as ?k, at least in one of the plurality of growth steps, the offset angle ?k is smaller than the offset angle ?k?1.

Abstract: In a manufacturing method of a silicon carbide single crystal, a seed crystal made of silicon carbide is prepared. The seed crystal has a growth surface and a stacking fault generation region and includes a threading dislocation that reaches the growth surface. The growth surface is inclined at a predetermined angle from a (0001) plane. The stacking fault generation region is configured to cause a stacking fault in the silicon carbide single crystal when the silicon carbide single crystal is grown. The stacking fault generation region is located at an end portion of the growth surface in an offset direction that is a direction of a vector defined by projecting a normal vector of the (0001) plane onto the growth surface. The seed crystal is joined to a pedestal, and the silicon carbide single crystal is grown on the growth surface of the seed crystal.