Abstract: A malfunction caused by sharp fluctuations in current is prevented while suppressing an increase in circuit size. A semiconductor device includes a plurality of modules. The semiconductor device includes: a table that stores a plurality of operating frequencies in each of the modules and a plurality of scores determined based on the operating frequencies such that the operating frequencies and the scores are associated with each other for each of the modules; a score specifying unit that acquires the clock operating frequencies of the modules and specifies the scores based on the clock operating frequencies with reference to the table; and an output unit that outputs an instruction to activate the modules at different times if the specified scores exceed a predetermined threshold value.

Abstract: A switching power source device for controlling a current flowing through a coil by turning on/off a switching element by a PWM control to obtain a desired DC voltage, includes in a PWM ON period to turn on the switching element by the PWM control, a switching control of the switching element is enabled by a first pulse signal whose cycle is shorter than a PWM cycle based on the PWM control and whose pulse width is gradually increased, in a first period just after the PWM ON period is started, and the switching control of the switching element is enabled by the PWM signal based on the PWM control after the first period has elapsed.

Abstract: A malfunction caused by sharp fluctuations in current is prevented while suppressing an increase in circuit size. A semiconductor device includes a plurality of modules. The semiconductor device includes: a table that stores a plurality of operating frequencies in each of the modules and a plurality of scores determined based on the operating frequencies such that the operating frequencies and the scores are associated with each other for each of the modules; a score specifying unit that acquires the clock operating frequencies of the modules and specifies the scores based on the clock operating frequencies with reference to the table; and an output unit that outputs an instruction to activate the modules at different times if the specified scores exceed a predetermined threshold value.

Abstract: A switching power source device for controlling a current flowing through a coil by turning on/off a switching element by a PWM control to obtain a desired DC voltage, includes in a PWM ON period to turn on the switching element by the PWM control, a switching control of the switching element is enabled by a first pulse signal whose cycle is shorter than a PWM cycle based on the PWM control and whose pulse width is gradually increased, in a first period just after the PWM ON period is started, and the switching control of the switching element is enabled by the PWM signal based on the PWM control after the first period has elapsed.

Abstract: The switching power source device obtains a desired DC voltage by controlling the current flowing through a coil by turning on and off a switching element by a PWM control. In the PWM ON period to turn on the switching element by the PWM control, the switching power source device is enabled to switch the switching element by a first pulse signal whose cycle is shorter than the PWM cycle and whose pulse width is gradually increased, in a first period just after the start of the PWM ON period. Further, the switching power source device is enabled to switch the switching element by a PWM signal based on the PWM control after the first period in the PWM ON period has elapsed. According to this approach, it is possible to reduce the harmonic noise.

Abstract: The switching power source device obtains a desired DC voltage by controlling the current flowing through a coil by turning on and off a switching element by a PWM control. In the PWM ON period to turn on the switching element by the PWM control, the switching power source device is enabled to switch the switching element by a first pulse signal whose cycle is shorter than the PWM cycle and whose pulse width is gradually increased, in a first period just after the start of the PWM ON period. Further, the switching power source device is enabled to switch the switching element by a PWM signal based on the PWM control after the first period in the PWM ON period has elapsed. According to this approach, it is possible to reduce the harmonic noise.

Abstract: A microcomputer includes a bus, a CPU (Central Processing Unit) coupled to the bus, a RAM (Random-access Memory) coupled to the bus, and an AD (Analog-to-Digital) converter coupled to the bus. The AD converter includes a switching circuit for switching between an analog signal and a reference potential, a first DA (Digital-to-Analog) converter including a plurality of first capacitors each having one end that can be individually coupled to the switching circuit and the other end coupled to a common output line, one or a plurality of testing capacitors that are dedicated for testing, each having one end to which the reference potential or a potential obtained by dividing the reference potential can be individually inputted, and a control circuit. In a normal mode, the control circuit determines a digital value corresponding to the analog signal, based on the output line.

Abstract: To determine the accuracy of an AD converter more simply than in the related art, a semiconductor device includes a successive approximation AD converter. The AD converter includes one or a plurality of testing capacitors used in a test mode, separately from a C-DAC used for AD conversion in a normal mode. In the test mode, the accuracy of a capacitor under test among a plurality of capacitors configuring the C-DAC is determined by comparing a potential occurring in the capacitor under test and a potential occurring in the testing capacitors.

Abstract: To determine the accuracy of an AD converter more simply than in the related art, a semiconductor device includes a successive approximation AD converter. The AD converter includes one or a plurality of testing capacitors used in a test mode, separately from a C-DAC used for AD conversion in a normal mode. In the test mode, the accuracy of a capacitor under test among a plurality of capacitors configuring the C-DAC is determined by comparing a potential occurring in the capacitor under test and a potential occurring in the testing capacitors.