Patents by Inventor Yasutaka Kobayashi

Yasutaka Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050241608
    Abstract: The present air cleaner includes: a cleaner case having a bottom wall, a circumferential side wall provided with an air inlet in its lower part, and a support wall formed on the bottom wall inside the circumferential side wall; and a cylindrical cleaner element supported on an upper end portion of the support wall. An air chamber is defined by the cleaner case, the support wall, and the cleaner element so as to surround the cleaner element and the support wall. A bottom of the cleaner element is inclined at an angle to the bottom wall of the cleaner case so that a distance between the bottom wall of the cleaner case and the bottom of the cleaner element increases from a side opposite to the air inlet toward an air inlet side.
    Type: Application
    Filed: April 26, 2005
    Publication date: November 3, 2005
    Applicant: Kawasaki Jukogyo Kabushiki Kaisha
    Inventors: Yasutaka Kobayashi, Kohei Kuyama, Kiyohito Takano
  • Publication number: 20040132255
    Abstract: It is an object of the invention to provide a semiconductor device having excellent characteristics, and to provide a producing method of the semiconductor device capable of producing the semiconductor device having excellent characteristics without deteriorating a film quality in the producing process. A first oxide film 2′ is divided into three regions A, B and C. Lengths I, II and III of the regions A, B and C in a plane direction of the silicon substrate 1 are set equal to each other. In the first oxide film 2′, a thermal treatment is carried out such that the film thicknesses of the regions A and C are increased. More specifically, the thermal treating time, the thermal treating temperature and other parameters are adjusted such that sectional areas of the regions A and C becomes 1.5 times of a sectional area of the region B. It is preferable that a film thickness of the region B is maintained.
    Type: Application
    Filed: January 6, 2003
    Publication date: July 8, 2004
    Inventors: Yuki Saito, Yasutaka Kobayashi
  • Patent number: 6715379
    Abstract: An all terrain vehicle comprising a V-belt continuously variable transmission and a gear-type transmission, being capable of transmitting drive torque from an engine with controlled engine braking but without loss of the torque, thereby giving a rider an improved driving feel. The V-belt continuously variable transmission and the gear-type transmission are placed in this order from upstream in a power transmission path from the engine to wheels. A one-way clutch for transmitting only the drive torque from the engine to the wheel and a torque limiter for transmitting the torque less than a predetermined value are arranged in parallel, between, e.g., a countershaft and forward intermediate gears fitted onto the countershaft.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: April 6, 2004
    Assignee: Kawasaki Jukogyo Kabushiki Kaisha
    Inventors: Akio Miguchi, Yasutaka Kobayashi
  • Patent number: 6713397
    Abstract: A gate electrode layer formed on a semiconductor substrate is etched. A gate electrode is formed while forming metal system sub-products onto the side walls of the gate electrode layer. The metal system sub-products formed on the side walls of the gate electrode layer are oxidized. The oxidized metal system sub-products are removed by a solution whose etching rate for the gate insulative film has been adjusted to 10 Å/min or less.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: March 30, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasutaka Kobayashi
  • Patent number: 6707113
    Abstract: A semiconductor device has a field-effect transistor with a source, drain, and channel formed in an active region surrounded by a field region. The boundary between the channel region and field region includes crenellations that reduce the effect of contaminating particles and defects. The crenellated boundary can be formed by polysilicon-buffered local oxidation of silicon, or by use of a crenellated mask pattern.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: March 16, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasutaka Kobayashi
  • Publication number: 20020160612
    Abstract: A gate electrode layer (103, 104) formed on a semiconductor substrate (101) is etched. A gate electrode is formed while forming metal system sub-products (107) onto the side walls of the gate electrode layer. The metal system sub-products formed on the side walls of the gate electrode layer are oxidized. The oxidized metal system sub-products are removed by a solution whose etching rate for the gate insulative film (102) has been adjusted to 10 Å/min or less.
    Type: Application
    Filed: August 30, 2001
    Publication date: October 31, 2002
    Inventor: Yasutaka Kobayashi
  • Publication number: 20020152838
    Abstract: Disclosed is an all terrain vehicle comprising a V-belt continuously variable transmission and a gear-type transmission, and capable of transmitting drive torque from an engine with controlled engine braking but without loss of the torque, thereby giving a rider an improved driving feel. The V-belt continuously variable transmission and the gear-type transmission are placed in this order from upstream in a power transmission path from the engine to wheels. A one-way clutch for transmitting only the drive torque from the engine to the wheel and a torque limiter for transmitting the torque less than a predetermined value are arranged in parallel, between, e.g., a countershaft and forward intermediate gears fitted onto the countershaft.
    Type: Application
    Filed: April 18, 2002
    Publication date: October 24, 2002
    Inventors: Akio Miguchi, Yasutaka Kobayashi
  • Patent number: 6049102
    Abstract: In a semiconductor memory having bit lines 10 for data input/output for a memory cell formed at the surface of a semiconductor substrate 1, grooves 19 extending along the direction of the wiring of the bit lines 10 are formed at an oxide film 18 with the bit lines 10 provided connected to the grooves 19. Since the bit lines 10 are made to connect to the grooves 19, the bit lines 10 are firmly secured to the oxide film 18. Thus, the bit lines 10 do not move even when stress is applied to their side surfaces during a heat treatment.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: April 11, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Masahiro Yamate, Yasutaka Kobayashi
  • Patent number: 5731125
    Abstract: A chemically amplified, radiation-sensitive resin composition which comprises a radiation-sensitive acid-generator which generates an acid upon irradiation with a radiation and in which the chemical change due to the catalytic action of said acid changes the solubility of the irradiated portion in a developer to form a pattern, characterized by comprising an anthracene derivative of the formula (1), representatives of which are anthracene-9-methanol and anthracene-9-carboxyethyl.
    Type: Grant
    Filed: February 2, 1996
    Date of Patent: March 24, 1998
    Assignee: Japan Synthetic Rubber Co., Ltd.
    Inventors: Mikio Yamachika, Masatoshi Kusama, Yasutaka Kobayashi, Akira Tsuji