Abstract: A method of making a semiconductor device includes forming a recess in a compound semiconductor substrate using a patterned insulating film on a surface of the substrate, implanting dopant ions at the bottom of the recess to form a channel region, and depositing a refractory metal film. The refractory metal film is etched, using a resist pattern, to form a gate electrode and additional dopant ions are implanted to form relatively highly doped regions intersecting the channel region. Very highly doped regions are formed my implantation, after removing the insulating film, using the gate electrode and remainder of the resist mask as an implantation mask. After stripping the resist, annealing to activate the implanted ions, and depositing a passivating film on the substrate and gate electrode, source and drain electrodes are formed.

Abstract: A method of fabricating an FET includes forming an active layer including a low dopant concentration layer, forming a recess in the active layer so that the bottom of the recess is present within the low dopant concentration semiconductor layer, forming side walls in the recess, and forming a gate electrode in the-recess using the side walls as masks. The gate length can be precisely reduced by the side walls. Further, even when the active layer is anisotropically etched to form the side walls, the low dopant concentration semiconductor layer is subjected to the etching. Therefore, a part of the active layer where a greater part of channel current flows is not adversely affected by the etching. Therefore, any variation in the thickness of the active layer does not vary the channel current of the transistor.

Abstract: A depletion layer forming element, for instance, a low impurity concentration layer, is provided between a gate electrode and a source or drain electrode. The depletion layer forms a surface depletion layer closer to a semiconductor substrate than a depletion layer formed in an active layer opposite the gate electrode. Alternatively, the depletion layer forming element is a reduced thickness portion of the active layer.

Abstract: An electrode of a semiconductor device includes an oxygen absorbing layer disposed on a surface of a semiconductor layer and a refractory metal layer disposed on the oxygen absorbing layer. Oxygen of a spontaneous oxide film on the semiconductor layer is taken to the oxygen absorbing layer, preventing the formation of interface levels within an interface metamorphic layer, preventing I.sub.d drifting.

Abstract: A light/ozone asher includes a process chamber having a sample stage for supporting a sample processed with active oxygen generated by irradiating ozone with UV rays while not irradiating the sample with UV rays. Since the sample is not irradiated with UV rays when an organic substance on the sample surface is removed, an organic substance (scum) left by removal of parts of the organic substance on the sample is removed without destroying the remaining pattern of organic substance.

Abstract: A high power output semiconductor device having a plurality of FET elements on a semi-insulating semiconductor substrate including a first conductivity type semiconductor layer on the semi-insulating semiconductor substrate, a plurality of source and drain electrodes alternatingly arranged on the semiconductor layer, a plurality of gate electrodes respectively disposed in gate recesses formed by etching respective surface regions of the semiconductor layer between each adjacent source and drain electrodes. The gate recess has a asymmetrical two-stage recess structure having a second bottom surface only at the source side of the recess at a depth between a first bottom surface in contact with the gate electrode and the upper surface of the semiconductor layer and is not in contact with the gate electrode.

Abstract: A method for producing a semiconductor device includes preparing a semi-insulating substrate having an active layer, depositing a first insulating film on the active layer and forming two first openings in the first insulating film, depositing a second insulating film on the first insulating film filling the first openings and make a flat surface with the surface of the first insulating film, removing a portion of the first insulating film between the first openings to form a second opening, etching the active layer through the second opening formed by the removal of the first insulating film, removing parts of the second insulating film on opposite sides of the first insulating film from the active layer to form a third opening, and etching the active layer through the third opening formed by removal of the second insulating film to form a double-stage recess.

Abstract: A method for producing a refractory metal gate electrode includes forming a patterning mask layer that is dissolved in a solution including hydrogen ions and having an aperture on a semiconductor substrate; forming a gate metal layer having an ionization potential larger than hydrogen on the entire surface of the patterning mask layer; forming a low resistance metal layer of a predetermined configuration having an ionization potential smaller than hydrogen on the gate metal layer; covering at least an upper surface of the low resistance metal layer with a film that has no reductive reaction with a solution including hydrogen ions; and removing the patterning mask layer using a solution including hydrogen ions after patterning the gate metal layer.

Abstract: In a field effect transistor including a Schottky gate electrode disposed on an active region in a compound semiconductor substrate, a compressive stress of the gate electrode and a tensile stress of an insulating film serving as a passivation are concentrated on the lower edges of the gate electrode, whereby positive piezoelectric charges are produced in the compound semiconductor substrate in the vicinity of the gate electrode. The positive piezoelectric charges increase the effective donor concentration, reducing the thickness of the surface depletion layer. As the result, channel narrowing due to the surface depletion layer is suppressed.

Abstract: In a semiconductor device having a gate electrode and an insulating film covering the gate electrode on a compound semiconductor substrate, the stress in the gate metal and the stress produced by the insulating film on the gate electrode cancel so that threshold voltage is not a function of gate orientation relative to the crystalline directions of the substrate.

Abstract: A compound semiconductor device includes a plurality of epitaxial compound semiconductor layers including an InGaAs layer as the uppermost layer disposed on a semi-insulating compound semiconductor substrate, a groove penetrating through at least the InGaAs layer, an insulating film disposed on the side surfaces of the groove and having ends extending beyond the groove, a gate electrode disposed in the groove and on the insulating film, and source and drain electrodes on the InGaAs layer at opposite sides of the groove self-aligned with the ends of the insulating film.

Abstract: A method of producing a field effect transistor includes depositing a first insulating film and a refractory metal on a semiconductor substrate, forming a first aperture penetrating the first insulating film and the refractory metal film to provide a gate electrode production region, depositing a second insulating film on the refractory metal film, etching the second insulating film in a direction perpendicular to the surface of the substrate leaving portions of the second insulating film on opposite side walls of the first aperture to form a second aperture, defining a gate length, depositing a gate metal, and patterning the gate metal layer, the first insulating film, and the refractory metal film in a prescribed width to form a T-shaped gate structure. During etching the second insulating film, since the refractory metal film serves as a etch stopping layer, the first insulating film is not etched and its thickness remains as deposited.

Abstract: In a semiconductor device having a gate electrode and an insulating film covering the gate electrode on a compound semiconductor substrate, the vector sum of the stress in the gate metal and the stress produced by the insulating film on the gate electrode is zero. A production method of a semiconductor device includes producing a gate electrode having the same but opposite stress of an insulating film by sputtering under an adjusted gas pressure a target of WSi.sub.x and depositing an insulating film covering the gate electrode.

Abstract: A method of producing a semiconductor device including the steps of depositing a refractory metal gate electrode at a predetermined region of a semi-insulating substrate surface, and thereafter depositing an insulating film at regions other than the gate electrode region, wherein the production of the insulating film is carried out by an electron cyclotron resonance plasma CVD method while applying a high frequency electrical bias to the substrate.

Abstract: A method for producing a field effect transistor includes depositing an insulating film on an active layer produced in a semiconductor substrate and removing a part of the insulating film, leaving a side wall substantially perpendicular to the substrate. A refractory metal is deposited on the surface of the semiconductor substrate and the insulating film. The refractory metal is removed except for a portion at the side wall of the insulating film to produce a gate electrode. A high dopant concentration region is ion implanted using the insulating film and refractory metal as a mask. The insulating film is removed and an intermediate dopant concentration region is ion implanted using the refractory metal as a mask. A source electrode is produced on the high dopant concentration region and a drain electrode is produced on the intermediate dopant concentration region. The invention may be used to produce asymmetrically doped drain and gate regions and an asymmetrically disposed gate electrode.

Abstract: A method for producing a field effect transistor includes depositing an insulating film on an active layer produced in a semiconductor substrate and removing a part of the insulating film, leaving a side wall substantially perpendicular to the substrate. A refractory metal is deposited on the surface of the semiconductor substrate and the insulating film. The refractory metal is removed except for a portion at the side wall of the insulating film to produce a gate electrode. A high dopant concentration region is ion implanted using the insulating film and refractory metal as a mask. The insulating film is removed and an intermediate dopant concentration region is ion implanted using the refractory metal as a mask. A source electrode is produced on the high dopant cocentration region and a drain electrode is produced on the intermediate dopant concentration region. The invention may be used to produce asymmetrically doped drain and gate regions and an asymmetrically disposed gate electrode.

Abstract: A semiconductor device, such as a MESFET having a self-aligned gate, and a method for production thereof. A triple layer film is formed on the semiconductor substrate, then anisotropically etched to produce a gate structure which is used as a mask in an ion implantation step for forming a source and drain. The triple layer film includes a lower high melting point metal silicide, an upper similar metal silicide and an intermediate high melting point metal layer. The first layer forms a Schottky barrier with the semiconductor substrate and serves as a metal silicide gate. The upper layer serves as a dummy gate. The intermediate metal layer serves to protect the metal silicide layers during the etching step, serves as an etchant stop during removal of the dummy gate, and also serves to protect the Schottky barrier after the device is completed.

Abstract: A field effect transistor includes a high concentration doping layer self-alignedly produced using a refractory metal silicide gate as a mask for ion implantation in a semi-insulating substrate. The distance between the refractory metal gate and the high concentration doping layer which becomes a source region is shorter than the distance between the refractory metal gate and a high concentration doping layer which becomes a drain region.A method of producing a field effect transistor having an offset refractory metal silicide gate includes depositing a refractory metal silicide layer, a refractory metal film, and a first insulator film successively on an active layer which is produced on a semi-insulating substate. The deposited layers are patterned with a resist film for producing a gate pattern mask for etching the respective layers all at once or one-by-one. High dopant concentration source and drain regions are formed by ion implantation and annealing.

Abstract: A method of producing a semiconductor device, such as a MESFET having a self-aligned gate. A triple layer film is formed on the semiconductor substrate. The lowermost layer is a high melting point metal silicide, the intermediate layer a thin high melting point metal and the upper layer an insulator. The thicknesses and etching rates of the layers are selected such that the thin intermediate metal layer protects the underlying silicide and overlying insulator layers during etching. The three layers are anisotropically etched to produce a well-formed gate structure which is used as a mask in an ion implantation step for forming source and drain regions. A subsequent selective etching process removes the insulator layer (which serves as a dummy gate) exposing the underlying silicide layer on which is deposited a low resistance metal such as gold in a self-aligned fashion thereby to improve the high frequency performance of the device.