Abstract: A communication method includes: performing carrier sensing at a predetermined time interval; transmitting first data including ID information of a current radio tag to an access point when a signal transmitted by another radio tag to the access point is not detected during the performing of the carrier sensing and the current radio tag is not in a transmission stop state; interpreting a command included in a signal, when the signal is detected during the performing of the carrier sensing and is not a signal transmitted by another radio tag to the access point, the interpreting being performed under an assumption that the signal detected is a signal transmitted from the access point; and changing the radio frequency of a signal to be transmitted by the current radio tag, when the interpreting shows that the signal includes a command instructing changing of a frequency.

Abstract: The radio receiving apparatus includes an adaptive receive filter capable of detecting an interference wave and an out-of-band noise level correctly and improving reception performance. The radio receiving apparatus has a plurality of filters, a received signal power meter that measures the overall received signal power, a calculator that performs calculation that associates the measured received signal power with an output of AGC, an interference power meter that measures signal power in a frequency band outside a necessary band of the received signal, a comparator that compares the calculation result by the calculator with a specific threshold, and switches that select a filter to be adopted from the plurality of filters based on the outputs of comparators. The radio receiving apparatus detects adjacent interference based on signal power in the frequency band outside the signal band and detects the noise level based on the power level at an antenna end.

Abstract: The dynamic DC offset canceling apparatus includes: section 104 that detects dynamic DC offset in longest overlapping part sequences from the differences between the sampling values of a first longest overlapping part sequence and the sampling values of a second longest overlapping part sequence, the first longest overlapping part sequence and the second longest overlapping part sequence being overlapping part sequences in a training sequence of the received signal; section 105 that detects dynamic DC offset outside the longest overlapping part sequences from the difference between an average value of sampling values of a received signal which exists in a burst before the first longest overlapping part sequence, and an average value of sampling values of a received signal which exists in a burst after the second longest overlapping part sequence; and section 106 that adaptively subtracts a DC offset value from the received signal based on these results.

Abstract: The dynamic DC offset canceling apparatus includes: section 104 that detects dynamic DC offset in longest overlapping part sequences from the differences between the sampling values of a first longest overlapping part sequence and the sampling values of a second longest overlapping part sequence, the first longest overlapping part sequence and the second longest overlapping part sequence being overlapping part sequences in a training sequence of the received signal; section 105 that detects dynamic DC offset outside the longest overlapping part sequences from the difference between an average value of sampling values of a received signal which exists in a burst before the first longest overlapping part sequence, and an average value of sampling values of a received signal which exists in a burst after the second longest overlapping part sequence; and section 106 that adaptively subtracts a DC offset value from the received signal based on these results.

Abstract: The radio receiving apparatus including an adaptive receive filter capable of detecting an interference wave and out-of-band noise level correctly and improving reception performance.

Abstract: A DC offset cancel circuit includes an analog adder 1 to whose one input a baseband analog signal output from a high-frequency reception section is input and to whose other input an analog correction signal output from a D/A converter 7 is input, and which corrects the reference voltage value of the baseband analog signal analogically to cancel a DC offset, an adder 3 which has the output of the A/D converter 2 as its one input and subtracts the lower bits of a sample value stored in a memory 6 to be described later as a DC offset value from the input value and outputs the resultant value, a control circuit 5 which outputs an output digital value of the A/D converter 2 as a sample value to the memory 6, and a D/A converter 7 which converts a digital value of the upper bits of a sample value stored in the memory 6 to an analog correction signal and outputs the analog correction signal to the analog adder 1.

Abstract: An A/D converter apparatus for converting an analog signal output from an anti-aliasing filter into a digital signal, a sinc filter for removing a frequency component corresponding to an aliasing noise generated by down-sampling, a first decimator for down-sampling a signal output from the sinc filter, a low pass filter for removing a frequency component corresponding to an aliasing noise generated by down-sampling, a second decimator for down-sampling a signal output from the low pass filter, and a high pass filter for removing a dc component from a signal output from the second decimator are disclosed.

Abstract: A DC offset cancel circuit includes an analog adder 1 to whose one input a baseband analog signal output from a high-frequency reception section is input and to whose other input an analog correction signal output from a D/A converter 7 is input, and which corrects the reference voltage value of the baseband analog signal analogically to cancel a DC offset, an adder 3 which has the output of the A/D converter 2 as its one input and subtracts the lower bits of a sample value stored in a memory 6 to be described later as a DC offset value from the input value and outputs the resultant value, a control circuit 5 which outputs an output digital value of the A/D converter 2 as a sample value to the memory 6, and a D/A converter 7 which converts a digital value of the upper bits of a sample value stored in the memory 6 to an analog correction signal and outputs the analog correction signal to the analog adder 1.

Abstract: An A/D converter apparatus for converting an analog signal output from an anti-aliasing filter into a digital signal, a sinc filter for removing a frequency component corresponding to an aliasing noise generated by down-sampling, a first decimator for down-sampling a signal output from the sinc filter, a low pass filter for removing a frequency component corresponding to an aliasing noise generated by down-sampling, a second decimator for down-sampling a signal output from the low pass filter, and a high pass filter for removing a dc component from a signal output from the second decimator are disclosed.