Patents by Inventor Yasutaka Yamada

Yasutaka Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240089712
    Abstract: An object is to provide a data collection device and the like capable of reducing a load on an IoT terminal in metadata transmission and power consumption associated with the metadata transmission. In the present invention, a controller is provided on a data collection side that collects metadata, the metadata transmitted from an IoT terminal is grasped, and the IoT terminal is instructed to reduce the transmission frequency of metadata that does not need high real-time property according to a sensor, the type of the IoT terminal, or the like. The IoT terminal transmits the metadata only at a window time (transmission timing, data size, metadata type, or the like) permitted by the metadata controller. As a result, the IoT terminal transmits the metadata only at a limited timing, and thus can reduce a transmission load and power consumption.
    Type: Application
    Filed: January 8, 2021
    Publication date: March 14, 2024
    Inventors: Shinya TAMAKI, Ryota SHIINA, Tetsuya SUZUKI, Yasutaka KIMURA, Tomohiro TANIGUCHI, Sei KOU, Tomoya HATANO, Takashi YAMADA
  • Patent number: 8123596
    Abstract: A power tool includes an air introduction device that can introduce an external air into the casing and can produce a spiral flow of the air within the casing. A motor is disposed within the casing.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: February 28, 2012
    Assignee: Makita Corporation
    Inventors: Eiji Kobayashi, Yasutaka Yamada, Hitoshi Sengiku, Akira Tomonaga, Hironori Ogura, Akira Hachisuka
  • Publication number: 20080305728
    Abstract: A power tool includes an air introduction device that can introduce an external air into the casing and can produce a spiral flow of the air within the casing. A motor is disposed within the casing.
    Type: Application
    Filed: May 19, 2008
    Publication date: December 11, 2008
    Applicant: Makita Corporation
    Inventors: Eiji Kobayashi, Yasutaka Yamada, Hitoshi Sengiku, Akira Tomonaga, Hironori Ogura, Akira Hachisuka
  • Patent number: 5818435
    Abstract: The object of the present invention is to provide a multimedia presentation device which, by executing a setting process for an information block, which is an address of an automatic branch, by means of an automatic discharge process for a button which stores the branch address, enables the user to understand how a branch address was selected. Command discharge condition information is stored the information block reproduction means for managing buttons which are automatically discharged at an end of a reproduction period or other such time, so that by executing a branch process by automatically selecting a button in place of a user operation, then even if there has been no user selection of a branch address before the end of the reproduction period, a branch address can be automatically selected and, by showing on the display the button which for manual selection stores a link to the same branch address, the data can be presented in a form which can readily understood by the user.
    Type: Grant
    Filed: June 12, 1995
    Date of Patent: October 6, 1998
    Assignee: Matsushita Electric Indusrial
    Inventors: Masayuki Kozuka, Paul Fletcher, Gary McGill, Yasutaka Yamada, Koichiro Endo, Mark Rogers, Phil Cooke, Mitsuhiro Inoue
  • Patent number: 5497467
    Abstract: A vector data processor includes a vector data buffer for receiving a plurality of arrayed data items requested from a storage including a plurality of storage banks (banks-0-3 in FIG. 2) for independent operations. The vector data buffer is constructed of a plurality of bank memories which conform to a corresponding periodic relationship between the arrayed data items and the storage banks. Date storing areas for storing the arrayed data items are preset on the successively different bank memories of the vector data buffer in the sequence in which the individual arrayed data items have been requested. The individual storage banks in the sequence in which the arrayed data items have been requested are respectively connected to the successively different bank memories, and the arrayed data items fetched from the individual storing banks are stored in the connected bank memories in succession.
    Type: Grant
    Filed: August 8, 1991
    Date of Patent: March 5, 1996
    Assignees: Hitachi, Ltd., Hitachi Computer Engineering Co., Ltd.
    Inventors: Fujio Wakui, Hirokatsu Fujiwara, Yasutaka Yamada
  • Patent number: 5226132
    Abstract: Instead of translation from a space address to a segment table origin address (STO) by an ordinary instruction, translation to the STO is done by a space base register modify instruction which uses an instruction to modify the content of the space register, and the result thereof is used for the operand address calculation of the instruction to the operand data fetching. The present system eliminates the need for additionally providing for hardware of an operand fetch unit hardware for the translation from the space address to the STO, memory for storing translation pairs of the space addresses and the STO's and the table look-up of the translation pairs. Thus, degradation of performance is minimized with less hardware.
    Type: Grant
    Filed: September 27, 1989
    Date of Patent: July 6, 1993
    Assignees: Hitachi, Ltd., Hitachi Computer Engineering Co., Ltd.
    Inventors: Michitaka Yamamoto, Toshinori Kuwabara, Yoshio Oshima, Yasutaka Yamada