Patents by Inventor Yasutomi Asai

Yasutomi Asai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10002841
    Abstract: Electrode pads disposed on a first surface of a semiconductor element include a first pad located close to a corner and a second pad located apart from the corner compared with the first pad. A first wire connected to the first pad has a smaller Young's modulus than a second wire connected to the second pad. A thickness of an intermetallic compound layer formed by the first wire and the first pad is larger than a thickness of an intermetallic compound layer formed by the second wire and the second pad.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: June 19, 2018
    Assignee: DENSO CORPORATION
    Inventors: Shotaro Miyawaki, Naohiko Hirano, Akiyoshi Asai, Yasutomi Asai
  • Publication number: 20170256510
    Abstract: Electrode pads disposed on a first surface of a semiconductor element include a first pad located close to a corner and a second pad located apart from the corner compared with the first pad. A first wire connected to the first pad has a smaller Young's modulus than a second wire connected to the second pad. A thickness of an intermetallic compound layer formed by the first wire and the first pad is larger than a thickness of an intermetallic compound layer formed by the second wire and the second pad.
    Type: Application
    Filed: July 31, 2015
    Publication date: September 7, 2017
    Inventors: Shotaro MIYAWAKI, Naohiko HIRANO, Akiyoshi ASAI, Yasutomi ASAI
  • Patent number: 9087924
    Abstract: An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: July 21, 2015
    Assignee: DENSO CORPORATION
    Inventors: Tetsuto Yamagishi, Tohru Nomura, Norihisa Imaizumi, Yasutomi Asai
  • Publication number: 20140217620
    Abstract: An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.
    Type: Application
    Filed: April 9, 2014
    Publication date: August 7, 2014
    Applicant: DENSO CORPORATION
    Inventors: Tetsuto YAMAGISHI, Tohru NOMURA, Norihisa IMAIZUMI, Yasutomi ASAI
  • Patent number: 8749055
    Abstract: An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: June 10, 2014
    Assignee: DENSO CORPORATION
    Inventors: Tetsuto Yamagishi, Tohru Nomura, Norihisa Imaizumi, Yasutomi Asai
  • Patent number: 8446003
    Abstract: A semiconductor device includes a multilayer wiring substrate and a double-sided multi-electrode chip. The double-sided multi-electrode chip includes a semiconductor chip and has multiple electrodes on both sides of the semiconductor chip. The double-sided multi-electrode chip is embedded in the multilayer wiring substrate in such a manner that the double-sided multi-electrode chip is not exposed outside the multilayer wiring substrate. The electrodes of the double-sided multi-electrode chip are connected to wiring layers of the multilayer wiring substrate.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: May 21, 2013
    Assignee: DENSO CORPORATION
    Inventors: Atsushi Komura, Yasuhiro Kitamura, Nozomu Akagi, Yasutomi Asai
  • Patent number: 8309434
    Abstract: A semiconductor device includes: a semiconductor element having first and second surfaces, wherein the semiconductor element includes at least one electrode, which is disposed on one of the first and second surfaces; and first and second metallic layers, wherein the first metallic layer is disposed on the first surface of the semiconductor element, and wherein the second metallic layer is disposed on the second surface of the semiconductor element. The one electrode is electrically coupled with one of the first and second metallic layers, which is disposed on the one of the first and second surfaces. The one electrode is coupled with an external circuit through the one of the first and second metallic layers.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: November 13, 2012
    Assignee: DENSO CORPORATION
    Inventors: Yasutomi Asai, Hiroshi Ishino
  • Publication number: 20120223444
    Abstract: An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.
    Type: Application
    Filed: April 18, 2012
    Publication date: September 6, 2012
    Applicant: DENSO CORPORATION
    Inventors: Tetsuto YAMAGISHI, Tohru Nomura, Norihisa Imaizumi, Yasutomi Asai
  • Patent number: 8207607
    Abstract: An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: June 26, 2012
    Assignee: DENSO CORPORATION
    Inventors: Tetsuto Yamagishi, Tohru Nomura, Norihisa Imaizumi, Yasutomi Asai
  • Publication number: 20110033975
    Abstract: A semiconductor device includes: a semiconductor element having first and second surfaces, wherein the semiconductor element includes at least one electrode, which is disposed on one of the first and second surfaces; and first and second metallic layers, wherein the first metallic layer is disposed on the first surface of the semiconductor element, and wherein the second metallic layer is disposed on the second surface of the semiconductor element. The one electrode is electrically coupled with one of the first and second metallic layers, which is disposed on the one of the first and second surfaces. The one electrode is coupled with an external circuit through the one of the first and second metallic layers.
    Type: Application
    Filed: September 14, 2010
    Publication date: February 10, 2011
    Applicant: DENSO CORPORATION
    Inventors: Yasutomi Asai, Hiroshi Ishino
  • Publication number: 20100295170
    Abstract: A semiconductor device includes a multilayer wiring substrate and a double-sided multi-electrode chip. The double-sided multi-electrode chip includes a semiconductor chip and has multiple electrodes on both sides of the semiconductor chip. The double-sided multi-electrode chip is embedded in the multilayer wiring substrate in such a manner that the double-sided multi-electrode chip is not exposed outside the multilayer wiring substrate. The electrodes of the double-sided multi-electrode chip are connected to wiring layers of the multilayer wiring substrate.
    Type: Application
    Filed: May 24, 2010
    Publication date: November 25, 2010
    Applicant: DENSO CORPORATION
    Inventors: Atsushi KOMURA, Yasuhiro Kitamura, Nozomu Akagi, Yasutomi Asai
  • Publication number: 20090152714
    Abstract: An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 18, 2009
    Applicant: DENSO CORPORATION
    Inventors: Tetsuto Yamagishi, Tohru Nomura, Norihisa Imaizumi, Yasutomi Asai
  • Publication number: 20070278550
    Abstract: A semiconductor device includes: a semiconductor element having first and second surfaces, wherein the semiconductor element includes at least one electrode, which is disposed on one of the first and second surfaces; and first and second metallic layers, wherein the first metallic layer is disposed on the first surface of the semiconductor element, and wherein the second metallic layer is disposed on the second surface of the semiconductor element. The one electrode is electrically coupled with one of the first and second metallic layers, which is disposed on the one of the first and second surfaces. The one electrode is coupled with an external circuit through the one of the first and second metallic layers.
    Type: Application
    Filed: May 31, 2007
    Publication date: December 6, 2007
    Applicant: DENSO CORPORATION
    Inventors: Yasutomi Asai, Hiroshi Ishino
  • Publication number: 20070075419
    Abstract: A semiconductor device includes: first to fourth vertical type semiconductor elements having first and second electrodes; a metallic lead; a resin mold; a circuit board; an electric circuit on the circuit board; and an electronic chip on the circuit board. The electronic chip drives and controls each semiconductor element through the electric circuit. The first to fourth semiconductor elements are arranged to be a stack construction in the resin mold. The first to fourth semiconductor elements provide a H-bridge circuit. Each of the first and second electrodes in each semiconductor element is directly connected to the metallic lead so that heat generated in the semiconductor element is radiated through the metallic lead.
    Type: Application
    Filed: September 5, 2006
    Publication date: April 5, 2007
    Applicant: DENSO CORPORATION
    Inventors: Yutaka Fukuda, Mitsuhiro Saitou, Toshihiro Nagaya, Yukihiro Maeda, Norihisa Imaizumi, Yasutomi Asai, Yasutomi Asai
  • Patent number: 6645606
    Abstract: A substrate has a first surface and a second surface. A plurality of pads is formed on the first surfaces. Each pads has a Cu plating layer and an Au plating layer that is directly formed on the Cu plating layer. Al wiring or Au wiring is bonded with the pads. The thickness of the Au plating layer that is bonded with the Al wiring is less than 0.5 &mgr;m. Thickness of the Au plating layer that is bonded with the Au wiring is 0.05 &mgr;m or more.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: November 11, 2003
    Assignee: Denso Corporation
    Inventors: Tetsuo Nakano, Yukihiro Maeda, Yasutomi Asai, Takashi Nagasaka
  • Publication number: 20020187319
    Abstract: A substrate has a first surface and a second surface. A plurality of pads is formed on the first surfaces. Each pads has a Cu plating layer and an Au plating layer that is directly formed on the Cu plating layer. Al wiring or Au wiring is bonded with the pads. The thickness of the Au plating layer that is bonded with the Al wiring is less than 0.5 &mgr;m. Thickness of the Au plating layer that is bonded with the Au wiring is 0.05 &mgr;m or more.
    Type: Application
    Filed: April 12, 2002
    Publication date: December 12, 2002
    Inventors: Tetsuo Nakano, Yukihiro Maeda, Yasutomi Asai, Takashi Nagasaka
  • Patent number: 6376906
    Abstract: In a mounting structure of a flip chip IC, the flip chip IC is mounted on an alumina laminated substrate through conductive lands of the substrate and bumps of the flip chip IC. A space between the flip chip IC and the substrate is filled with resin. Further, inspection lands are provided on the substrate for inspecting the flip chip IC, and are electrically connected to the conductive lands through vias and inside wires provided in the substrate. That is, the inspection lands are connected to the conductive lands to bypath an edge portion of the resin. As a result, separation of the resin from the substrate can be prevented.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: April 23, 2002
    Assignee: Denso Corporation
    Inventors: Yasutomi Asai, Shinji Ota, Takashi Nagasaka
  • Patent number: 6326239
    Abstract: A mounting structure includes a laminated ceramic capacitor mounted on a mounting substrate. The laminated ceramic capacitor includes a main body chip made by a ceramic dielectric, internal layer electrodes, and pair of terminal electrodes. The mounting substrate is made by alumina substrate, and has a pair of substrate electrodes made by copper plating. The laminated ceramic capacitor is mounted on the mounting substrate by using an Ag paste. Here, the substrate electrode is set to be smaller than the Ag paste. That is, the Ag paste is extruded from the terminal electrodes and the substrate electrode so as to contact to both of the main body chip and the mounting substrate. Because the Ag paste has a high adhesive strength compared to that when it is bonded with a metal, total adhesive strength can be improved. Consequently, the reliability of mounting can be improved.
    Type: Grant
    Filed: April 6, 1999
    Date of Patent: December 4, 2001
    Assignee: Denso Corporation
    Inventors: Yasutomi Asai, Hirokazu Imai, Yuji Ootani, Takashi Nagasaka
  • Patent number: 6217990
    Abstract: A multilayer circuit board for holding a flip chip thereon includes laminated first to fourth substrates. A first pattern integrated portion having a locally high pattern density is provided on the second substrate. Further, on the fourth substrate which is disposed on an opposite side of the second substrate with respect to a center in a laminated direction of the circuit board, a second pattern integrated portion having a locally high pattern density is disposed to correspond to the first pattern integrated portion. Accordingly, a local warp can be prevented from being produced on the mounting surface of the multilayer circuit board when the circuit board is manufactured by baking.
    Type: Grant
    Filed: May 6, 1998
    Date of Patent: April 17, 2001
    Assignees: Denso Corporation, Kyocera Corporation
    Inventors: Yasutomi Asai, Takashi Nagasaka, Shinji Ota, Takashi Yamazaki, Shinya Terao, Syoichi Nakagawa
  • Patent number: 6048424
    Abstract: Via portions are formed in a first green sheet for a first layer of a laminated substrate. Then, conductive lands are formed on a surface of the first green sheet and a wiring pattern is formed on a back face of the first green sheet to be connected to the conductive lands through the via portions. The thus formed first green sheet is joined to a second green sheet having via portions therein so that the wiring pattern of the first green sheet contacts the via portions of the second green sheet. In this case, by forming the wiring pattern on the back face of the first green sheet, lamination slippage of the wiring pattern caused by lamination of the first and second green sheets can be prevented.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: April 11, 2000
    Assignee: Denso Corporation
    Inventors: Yasutomi Asai, Takashi Nagasaka, Kenichi Gohara, Takashi Yamasaki, Yoshiaki Shimojo