Patents by Inventor Yasutomo Matsuba
Yasutomo Matsuba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240114174Abstract: A method and a video processor for preventing start code confusion. The method includes aligning bytes of a slice header relating to slice data when the slice header is not byte aligned or inserting differential data at the end of the slice header before the slice data when the slice header is byte aligned, performing emulation prevention byte insertion on the slice header, and combine the slice header and the slice data after performing emulation prevention byte insertion.Type: ApplicationFiled: December 15, 2023Publication date: April 4, 2024Inventors: Vivienne Sze, Madhukar Budagavi, Akira Osamoto, Yasutomo Matsuba
-
Publication number: 20240080474Abstract: Systems and techniques are provided for processing video data. For example, an apparatus may obtain one or more first sets of collocated motion vector data and one or more second sets of collocated motion vector data, associated with a respective first and second block of video data included in a current frame of video data. The apparatus may project the one or more first sets of collocated motion vector data into a first projected motion field associated with a first buffer and project the one or more second sets of collocated motion vector data into the first projected motion field associated with the first buffer. Based on projecting the one or more first sets and one or more second sets of collocated motion vector data, the apparatus may decode the first block of video data based on the first projected motion field associated with the first buffer.Type: ApplicationFiled: September 2, 2022Publication date: March 7, 2024Inventors: Gopi Madhan DABBADI, Yasutomo MATSUBA, Sandeep Nellikatte SRIVATSA, Ashish MISHRA
-
Patent number: 11849148Abstract: A method and a video processor for preventing start code confusion. The method includes aligning bytes of a slice header relating to slice data when the slice header is not byte aligned or inserting differential data at the end of the slice header before the slice data when the slice header is byte aligned, performing emulation prevention byte insertion on the slice header, and combine the slice header and the slice data after performing emulation prevention byte insertion.Type: GrantFiled: June 17, 2021Date of Patent: December 19, 2023Assignee: Texas Instruments IncorporatedInventors: Vivienne Sze, Madhukar Budagavi, Akira Osamoto, Yasutomo Matsuba
-
Patent number: 11638020Abstract: A device includes a first bitstream engine and a second bitstream engine. The first bitstream engine is configured to decode a first portion of a first video frame of a plurality of video frames to generate first decoded portion data. The first bitstream engine is also configured to generate synchronization information based on completion of decoding the first portion. The second bitstream engine is configured to, based on the synchronization information, initiate decoding of a second portion of a particular video frame to generate second decoded portion data. The second bitstream engine uses the first decoded portion data during decoding of the second portion of the particular video frame. The particular video frame includes the first video frame or a second video frame of the plurality of video frames.Type: GrantFiled: March 30, 2021Date of Patent: April 25, 2023Assignee: Qualcomm IncorporatedInventors: Yasutomo Matsuba, Kai Wang
-
Publication number: 20230059060Abstract: An example apparatus includes a first frame buffer configured to store video data; a second frame buffer configured to store video data; and one or more processors configured to: reconstruct samples of a first block of a current picture of video data; store, in parallel, a compressed version of the samples of the first block of video data in the first frame buffer and an uncompressed version of the samples of the first block of video data in the second frame buffer; and responsive to determining to reconstruct a second block of the current picture of video data using intra block copy: obtain, from the second frame buffer, samples of a predictor block located in the current picture of video data, the predictor block at least partially overlapping the first block of video data; and predict, based on the obtained samples of the predictor block, samples of the second block.Type: ApplicationFiled: October 20, 2022Publication date: February 23, 2023Inventors: Kapil Garg, Gaurav Avinash Patil, Yasutomo Matsuba, Vladan Andrijanic, Prasanth Gomatam, Rajesh Chowdary Chitturi
-
Patent number: 11516477Abstract: An example apparatus includes a first frame buffer configured to store video data; a second frame buffer configured to store video data; and one or more processors configured to: reconstruct samples of a first block of a current picture of video data; store, in parallel, a compressed version of the samples of the first block of video data in the first frame buffer and an uncompressed version of the samples of the first block of video data in the second frame buffer; and responsive to determining to reconstruct a second block of the current picture of video data using intra block copy: obtain, from the second frame buffer, samples of a predictor block located in the current picture of video data, the predictor block at least partially overlapping the first block of video data; and predict, based on the obtained samples of the predictor block, samples of the second block.Type: GrantFiled: February 11, 2021Date of Patent: November 29, 2022Assignee: Qualcomm IncorporatedInventors: Kapil Garg, Gaurav Patil, Yasutomo Matsuba, Vladan Andrijanic, Prasanth Gomatam, Rajesh Chowdary Chitturi
-
Publication number: 20220321899Abstract: A device includes a first bitstream engine and a second bitstream engine. The first bitstream engine is configured to decode a first portion of a first video frame of a plurality of video frames to generate first decoded portion data. The first bitstream engine is also configured to generate synchronization information based on completion of decoding the first portion. The second bitstream engine is configured to, based on the synchronization information, initiate decoding of a second portion of a particular video frame to generate second decoded portion data. The second bitstream engine uses the first decoded portion data during decoding of the second portion of the particular video frame. The particular video frame includes the first video frame or a second video frame of the plurality of video frames.Type: ApplicationFiled: March 30, 2021Publication date: October 6, 2022Inventors: Yasutomo MATSUBA, Kai WANG
-
Patent number: 11463716Abstract: An example apparatus includes a first line buffer and a second line buffer, where each memory location in the first line buffer and the second line buffer corresponds to a row or column of a palette token block. The first line buffer may store two of the neighboring palette token values (e.g., above and left palette token values), and the second line buffer may store one of the neighboring palette token value (e.g., above-left). As a video coder is coding palette token values, the video coder may shift values stored in the first line buffer to the overwrite a memory location in the second line buffer, and overwrite values stored in the first line buffer based in part on the row or column of the palette token block to which the memory locations in the first and second line buffer correspond.Type: GrantFiled: February 25, 2021Date of Patent: October 4, 2022Assignee: Qualcomm IncorporatedInventors: Yasutomo Matsuba, David Chu
-
Publication number: 20220272367Abstract: An example apparatus includes a first line buffer and a second line buffer, where each memory location in the first line buffer and the second line buffer corresponds to a row or column of a palette token block. The first line buffer may store two of the neighboring palette token values (e.g., above and left palette token values), and the second line buffer may store one of the neighboring palette token value (e.g., above-left). As a video coder is coding palette token values, the video coder may shift values stored in the first line buffer to the overwrite a memory location in the second line buffer, and overwrite values stored in the first line buffer based in part on the row or column of the palette token block to which the memory locations in the first and second line buffer correspond.Type: ApplicationFiled: February 25, 2021Publication date: August 25, 2022Inventors: Yasutomo Matsuba, David Chu
-
Publication number: 20220256167Abstract: An example apparatus includes a first frame buffer configured to store video data; a second frame buffer configured to store video data; and one or more processors configured to: reconstruct samples of a first block of a current picture of video data; store, in parallel, a compressed version of the samples of the first block of video data in the first frame buffer and an uncompressed version of the samples of the first block of video data in the second frame buffer; and responsive to determining to reconstruct a second block of the current picture of video data using intra block copy: obtain, from the second frame buffer, samples of a predictor block located in the current picture of video data, the predictor block at least partially overlapping the first block of video data; and predict, based on the obtained samples of the predictor block, samples of the second block.Type: ApplicationFiled: February 11, 2021Publication date: August 11, 2022Inventors: Kapil Garg, Gaurav Patil, Yasutomo Matsuba, Vladan Andrijanic, Prasanth Gomatam, Rajesh Chowdary Chitturi
-
Publication number: 20210314627Abstract: A method and a video processor for preventing start code confusion. The method includes aligning bytes of a slice header relating to slice data when the slice header is not byte aligned or inserting differential data at the end of the slice header before the slice data when the slice header is byte aligned, performing emulation prevention byte insertion on the slice header, and combine the slice header and the slice data after performing emulation prevention byte insertion.Type: ApplicationFiled: June 17, 2021Publication date: October 7, 2021Inventors: Vivienne Sze, Madhukar Budagavi, Akira Osamoto, Yasutomo Matsuba
-
Patent number: 11070844Abstract: A method and a video processor for preventing start code confusion. The method includes aligning bytes of a slice header relating to slice data when the slice header is not byte aligned or inserting differential data at the end of the slice header before the slice data when the slice header is byte aligned, performing emulation prevention byte insertion on the slice header, and combine the slice header and the slice data after performing emulation prevention byte insertion.Type: GrantFiled: January 31, 2019Date of Patent: July 20, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Vivienne Sze, Madhukar Budagavi, Akira Osamoto, Yasutomo Matsuba
-
Publication number: 20190303174Abstract: Systems and methods implemented in firmware and hardware domains may include writing by the firmware domain configuration information to a memory for a plurality of passes of hardware processing, programming by the hardware domain configuration registers with the configuration information retrieved from the memory, and processing by the hardware domain the plurality of passes in accordance with the configuration information programmed in the configuration registers. The configuration registers may be programmed after the configuration information are written to the memory.Type: ApplicationFiled: March 28, 2019Publication date: October 3, 2019Inventors: Srikanth ALAPARTHI, Harikrishna REDDY, Yasutomo MATSUBA, Ashish MEDEWAR, Siddharth KHIMSARA
-
Publication number: 20190166384Abstract: A method and a video processor for preventing start code confusion. The method includes aligning bytes of a slice header relating to slice data when the slice header is not byte aligned or inserting differential data at the end of the slice header before the slice data when the slice header is byte aligned, performing emulation prevention byte insertion on the slice header, and combine the slice header and the slice data after performing emulation prevention byte insertion.Type: ApplicationFiled: January 31, 2019Publication date: May 30, 2019Inventors: Vivienne Sze, Madhukar Budagavi, Akira Osamoto, Yasutomo Matsuba
-
Patent number: 10230989Abstract: A method and a video processor for preventing start code confusion. The method includes aligning bytes of a slice header relating to slice data when the slice header is not byte aligned or inserting differential data at the end of the slice header before the slice data when the slice header is byte aligned, performing emulation prevention byte insertion on the slice header, and combine the slice header and the slice data after performing emulation prevention byte insertion.Type: GrantFiled: June 21, 2012Date of Patent: March 12, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Vivienne Sze, Madhukar Budagavi, Akira Osamoto, Yasutomo Matsuba
-
Publication number: 20180278948Abstract: Example video encoding techniques are described. A video encoder may generate residual data for macroblocks for tiles of a current frame. Each tile includes a plurality of macroblocks, each tile is independently encoded from the other tiles of the current frame, and a width of each tile is less than a width of the current frame. The video encoder may store the residual data in buffers. Each buffer is associated with one or more tiles, and each buffer is configured to store residual data for macroblocks for the one or more tiles with which each buffer is associated. The video encoder may read the residual data from the plurality of buffers for macroblocks of an entire row of the current frame before reading residual data from the plurality of buffers for macroblocks of any other row of the current frame, and encode values based on the read residual data.Type: ApplicationFiled: March 23, 2017Publication date: September 27, 2018Inventors: Yasutomo Matsuba, Hariharan Ganesh Lalgudi, Yunqing Chen, Vladan Andrijanic, Shyamprasad Chikkerur, Harikrishna Reddy, Kai Wang
-
Patent number: 9819968Abstract: A method and apparatus for error detection. The method includes decoding slice header when a unit is a NAL unit, decoding a macroblock unit and detecting an end of slice flag setting indicating end of slice, decoding RBSP(Raw Byte Sequence Payload) trailing bits and determining if it is end of slice, and determining an error occurred when it is not end of slice. The apparatus configured to decoding via a digital processor a slice header when a unit is a NAL unit, decoding a macroblock unit and detecting an end of slice flag setting indicating an end of slice, decoding RBSP trailing bits and determining if it is the end of slice, and determining an error occurred when it is not end of slice.Type: GrantFiled: January 12, 2012Date of Patent: November 14, 2017Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yasutomo Matsuba, Akira Osamoto
-
Patent number: 9313513Abstract: A method for detecting a resynchronization marker in an encoded MPEG-4 video bitstream is provided that includes computing a first candidate resynchronization marker length based on a first version of MPEG-4 Visual and the type of a video object plane (VOP) in the video bitstream, computing a second candidate resynchronization marker length based on a second version of MPEG-4 Visual and the type of the VOP, checking the video bitstream for a first valid resynchronization marker bit sequence using the first candidate resynchronization marker length, checking the video bitstream for a second valid resynchronization marker bit sequence using the second candidate resynchronization marker length, and detecting the resynchronization marker when a valid sequence of stuffing bits is present in the video bitstream after the macroblock boundary and either the first valid resynchronization marker bit sequence or the second valid resynchronization marker bit sequence is found in the video bitstream.Type: GrantFiled: June 10, 2009Date of Patent: April 12, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Yasutomo Matsuba
-
Patent number: 8634474Abstract: This invention is computer implemented method of encoding video data into a compressed form. Encoding each macroblock in a frame of video data stores Context based Adaptive Binary Arithmetic Coding (CABAC) data in first and second CABAC engine registers. Each macroblock is classified into either a first type having recoverable CABAC engine registers or a second type having non-recoverable CABAC engine registers. The method closes a slice of data if the current macroblock exceeds a slice data size limit. The method restores or re-encodes previous macroblock CABAC engine registers dependent upon the states of the previous macroblock and the macroblock before that.Type: GrantFiled: May 3, 2011Date of Patent: January 21, 2014Assignee: Texas Instruments IncorporatedInventors: Yasutomo Matsuba, Akira Osamoto
-
Publication number: 20130163677Abstract: A method and a video processor for preventing start code confusion. The method includes aligning bytes of a slice header relating to slice data when the slice header is not byte aligned or inserting differential data at the end of the slice header before the slice data when the slice header is byte aligned, performing emulation prevention byte insertion on the slice header, and combine the slice header and the slice data after performing emulation prevention byte insertion.Type: ApplicationFiled: June 21, 2012Publication date: June 27, 2013Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Vivienne Sze, Madhukar Budagavi, Akira Osamoto, Yasutomo Matsuba