Abstract: The present invention provides a thin film transistor array substrate that can eliminate short-circuiting between a source electrode and a drain electrode, while ensuring electrical connection between the drain electrode and a pixel electrode. The thin film transistor array substrate has a thin film transistor, a first interlayer insulating film, a lower layer electrode, a second interlayer insulating film, and an upper layer electrode laminated therein in this order.

Abstract: The present invention provides a thin film transistor array substrate that can eliminate short-circuiting between a source electrode and a drain electrode, while ensuring electrical connection between the drain electrode and a pixel electrode. The thin film transistor array substrate has a thin film transistor, a first interlayer insulating film, a lower layer electrode, a second interlayer insulating film, and an upper layer electrode laminated therein in this order.

Abstract: The present invention provides: a display panel substrate that has an excellent boundary surface adhesion between an insulating film and electrodes formed on the substrate, that particularly requires a configuration in which the lower electrode, the insulating film, and an upper electrode are layered on the substrate in this order from the substrate side, and that includes an auxiliary metal wiring for reducing the wiring resistance, where detachment between the lower electrode and the insulating film is sufficiently suppressed when the lower electrode must be made of ITO; a method for manufacturing such a display panel substrate; and a display panel and a display device including such a display panel substrate. A display panel substrate of the present invention has a lower electrode, an insulating film, and an upper electrode layered thereon in this order from the substrate side.