Patents by Inventor Yasutoshi Aibara

Yasutoshi Aibara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9986172
    Abstract: A semiconductor device including a control signal generating circuit that outputs an exposure time switching pulse and a sweep period pulse, the exposure time switching pulse indicating a length of an exposure time in which light-receiving elements receive incident light, and the sweep period pulse specifying a time in which a ramp signal generating circuit sweeps a ramp signal; and a ramp waveform control circuit that stores a short-time exposure slope setting value and a long-time exposure slope setting value, switches between the short-time exposure slope setting value and the long-time exposure slope setting value according to the exposure time switching pulse, and outputs the switched one of the short-time exposure slope setting value and the long-time exposure slope setting value, the short-time exposure slope setting value setting a slope of the ramp signal used when the exposure time switching pulse indicates a short-time exposure period.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: May 29, 2018
    Assignee: Renesas Electronics Corporation
    Inventor: Yasutoshi Aibara
  • Publication number: 20180054584
    Abstract: An imaging device is provided which can secure the dynamic range of a COMS imaging sensor, by storing a charge overflowing from a floating diffusion in a storage capacitance element and suppressing the increase of a pixel area which occurs if the storage capacitance element is formed by a MOS capacitor. The imaging device includes plural pixel circuits arranged in the row direction and the column direction, and plural storage capacitance lines arranged in the row direction and extending in the column direction. Each of the storage capacitance lines is coupled to the pixel circuits arranged in the same column. The pixel circuit includes a first photoelectric conversion element which stores a charge generated by being subjected to light, a floating diffusion to which the charge stored in the first photoelectric conversion element is transferred, and a first switching transistor coupling the floating diffusion and the storage capacitance line.
    Type: Application
    Filed: October 12, 2017
    Publication date: February 22, 2018
    Inventors: Atsushi SUZUKI, Yasutoshi AIBARA
  • Publication number: 20170374264
    Abstract: A semiconductor device including a control signal generating circuit that outputs an exposure time switching pulse and a sweep period pulse, the exposure time switching pulse indicating a length of an exposure time in which light-receiving elements receive incident light, and the sweep period pulse specifying a time in which a ramp signal generating circuit sweeps a ramp signal; and a ramp waveform control circuit that stores a short-time exposure slope setting value and a long-time exposure slope setting value, switches between the short-time exposure slope setting value and the long-time exposure slope setting value according to the exposure time switching pulse, and outputs the switched one of the short-time exposure slope setting value and the long-time exposure slope setting value, the short-time exposure slope setting value setting a slope of the ramp signal used when the exposure time switching pulse indicates a short-time exposure period.
    Type: Application
    Filed: September 7, 2017
    Publication date: December 28, 2017
    Inventor: Yasutoshi AIBARA
  • Patent number: 9819884
    Abstract: An imaging device is provided which can secure the dynamic range of a COMS imaging sensor, by storing a charge overflowing from a floating diffusion in a storage capacitance element and suppressing the increase of a pixel area which occurs if the storage capacitance element is formed by a MOS capacitor. The imaging device includes plural pixel circuits arranged in the row direction and the column direction, and plural storage capacitance lines arranged in the row direction and extending in the column direction. Each of the storage capacitance lines is coupled to the pixel circuits arranged in the same column. The pixel circuit includes a first photoelectric conversion element which stores a charge generated by being subjected to light, a floating diffusion to which the charge stored in the first photoelectric conversion element is transferred, and a first switching transistor coupling the floating diffusion and the storage capacitance line.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: November 14, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Atsushi Suzuki, Yasutoshi Aibara
  • Publication number: 20170264847
    Abstract: Conventional semiconductor devices disadvantageously failed to sufficiently enlarge a dynamic range. A semiconductor device according to an embodiment includes a plurality of registers 21 to 26 that sets a gradient of a ramp signal. In the semiconductor device, the values in the registers 24 to 26 that are reflected in the gradient of the ramp signal are switched at predetermined timings, whereby a ramp signal with a gradient that changes at the predetermined timings is generated, and an analog-to-digital converter uses the ramp signal to convert pixel signals acquired from a pixel area into digital values.
    Type: Application
    Filed: May 25, 2017
    Publication date: September 14, 2017
    Applicant: Renesas Electronics Corporation
    Inventor: Yasutoshi AIBARA
  • Patent number: 9762809
    Abstract: A problem in conventional semiconductor devices is that a frame rate for acquiring images cannot be increased. A semiconductor device according to one embodiment sets a slope of a ramp signal provided to an analog-to-digital converter for converting pixel signals into digital values such that it becomes large in a conversion process corresponding to short-time exposure whereas it becomes small in a conversion process corresponding to long-time exposure, sets a sweep time of the ramp signal such that it becomes short in the conversion process corresponding to the short-time exposure, whereas it becomes long in the conversion process corresponding to the long-time exposure, and generates two pieces of data such that the number of bits in a digital value corresponding to the short-time exposure will become smaller than the number of bits in the digital value corresponding to the long-time exposure.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: September 12, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Yasutoshi Aibara
  • Publication number: 20170251158
    Abstract: A CMOS image sensor used as a solid-state image sensing device includes a pixel circuit for outputting a voltage of a level corresponding to the illuminance, and an A/D converter for converting an output voltage of the pixel circuit into a digital signal. The resolution on the low illuminance side is higher than the resolution on the high illuminance side in the A/D converter. Thus, the dynamic range can be increased and the operation speed can be increased, compared to the case in which the resolution is constant independent of the illuminance.
    Type: Application
    Filed: March 20, 2017
    Publication date: August 31, 2017
    Inventors: Yasutoshi AIBARA, Fumihide MURAO
  • Publication number: 20170180669
    Abstract: An imaging device is provided which can secure the dynamic range of a COMS imaging sensor, by storing a charge overflowing from a floating diffusion in a storage capacitance element and suppressing the increase of a pixel area which occurs if the storage capacitance element is formed by a MOS capacitor. The imaging device includes plural pixel circuits arranged in the row direction and the column direction, and plural storage capacitance lines arranged in the row direction and extending in the column direction. Each of the storage capacitance lines is coupled to the pixel circuits arranged in the same column. The pixel circuit includes a first photoelectric conversion element which stores a charge generated by being subjected to light, a floating diffusion to which the charge stored in the first photoelectric conversion element is transferred, and a first switching transistor coupling the floating diffusion and the storage capacitance line.
    Type: Application
    Filed: March 8, 2017
    Publication date: June 22, 2017
    Inventors: Atsushi SUZUKI, Yasutoshi AIBARA
  • Patent number: 9686494
    Abstract: Conventional semiconductor devices disadvantageously failed to sufficiently enlarge a dynamic range. A semiconductor device according to an embodiment includes a plurality of registers 21 to 26 that sets a gradient of a ramp signal. In the semiconductor device, the values in the registers 24 to 26 that are reflected in the gradient of the ramp signal are switched at predetermined timings, whereby a ramp signal with a gradient that changes at the predetermined timings is generated, and an analog-to-digital converter uses the ramp signal to convert pixel signals acquired from a pixel area into digital values.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: June 20, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Yasutoshi Aibara
  • Patent number: 9641779
    Abstract: A CMOS image sensor used as a solid-state image sensing device includes a pixel circuit for outputting a voltage of a level corresponding to the illuminance, and an A/D converter for converting an output voltage of the pixel circuit into a digital signal. The resolution on the low illuminance side is higher than the resolution on the high illuminance side in the A/D converter. Thus, the dynamic range can be increased and the operation speed can be increased, compared to the case in which the resolution is constant independent of the illuminance.
    Type: Grant
    Filed: October 18, 2014
    Date of Patent: May 2, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Yasutoshi Aibara, Fumihide Murao
  • Patent number: 9628736
    Abstract: An imaging device is provided which can secure the dynamic range of a COMS imaging sensor, by storing a charge overflowing from a floating diffusion in a storage capacitance element and suppressing the increase of a pixel area which occurs if the storage capacitance element is formed by a MOS capacitor. The imaging device includes plural pixel circuits arranged in the row direction and the column direction, and plural storage capacitance lines arranged in the row direction and extending in the column direction. Each of the storage capacitance lines is coupled to the pixel circuits arranged in the same column. The pixel circuit includes a first photoelectric conversion element which stores a charge generated by being subjected to light, a floating diffusion to which the charge stored in the first photoelectric conversion element is transferred, and a first switching transistor coupling the floating diffusion and the storage capacitance line.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: April 18, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Atsushi Suzuki, Yasutoshi Aibara
  • Publication number: 20170064237
    Abstract: A problem in conventional semiconductor devices is that a frame rate for acquiring images cannot be increased. A semiconductor device according to one embodiment sets a slope of a ramp signal provided to an analog-to-digital converter for converting pixel signals into digital values such that it becomes large in a conversion process corresponding to short-time exposure whereas it becomes small in a conversion process corresponding to long-time exposure, sets a sweep time of the ramp signal such that it becomes short in the conversion process corresponding to the short-time exposure, whereas it becomes long in the conversion process corresponding to the long-time exposure, and generates two pieces of data such that the number of bits in a digital value corresponding to the short-time exposure will become smaller than the number of bits in the digital value corresponding to the long-time exposure.
    Type: Application
    Filed: June 17, 2016
    Publication date: March 2, 2017
    Inventor: Yasutoshi AIBARA
  • Publication number: 20160021323
    Abstract: Conventional semiconductor devices disadvantageously failed to sufficiently enlarge a dynamic range. A semiconductor device according to an embodiment includes a plurality of registers 21 to 26 that sets a gradient of a ramp signal. In the semiconductor device, the values in the registers 24 to 26 that are reflected in the gradient of the ramp signal are switched at predetermined timings, whereby a ramp signal with a gradient that changes at the predetermined timings is generated, and an analog-to-digital converter uses the ramp signal to convert pixel signals acquired from a pixel area into digital values.
    Type: Application
    Filed: June 29, 2015
    Publication date: January 21, 2016
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Yasutoshi AIBARA
  • Patent number: 9143714
    Abstract: There is a need to provide an AD converter capable of reducing occurrence of a noise. An AD converter includes an operational amplifier and a clip circuit. The operational amplifier receives ramp voltage and voltage for an analog signal and allows output terminal voltage to transition from an H level to an L level when a change in the ramp voltage reaches the voltage for the analog signal. The clip circuit fixes an output terminal of the operational amplifier to clipping voltage after output voltage for the operational amplifier reaches threshold voltage for a latch circuit. Therefore, the AD converter can limit a range of output voltage, as a source of noise, for the operational amplifier and eliminate an unnecessary change in the output voltage after the threshold voltage for the latch circuit is reached.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: September 22, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Osamu Nishikido, Yasutoshi Aibara, Hirokazu Shimizu, Satoshi Tatsukawa, Takayoshi Shigekura
  • Publication number: 20150146060
    Abstract: An imaging device is provided which can secure the dynamic range of a COMS imaging sensor, by storing a charge overflowing from a floating diffusion in a storage capacitance element and suppressing the increase of a pixel area which occurs if the storage capacitance element is formed by a MOS capacitor. The imaging device includes plural pixel circuits arranged in the row direction and the column direction, and plural storage capacitance lines arranged in the row direction and extending in the column direction. Each of the storage capacitance lines is coupled to the pixel circuits arranged in the same column. The pixel circuit includes a first photoelectric conversion element which stores a charge generated by being subjected to light, a floating diffusion to which the charge stored in the first photoelectric conversion element is transferred, and a first switching transistor coupling the floating diffusion and the storage capacitance line.
    Type: Application
    Filed: November 13, 2014
    Publication date: May 28, 2015
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Atsushi SUZUKI, Yasutoshi AIBARA
  • Publication number: 20150109506
    Abstract: A CMOS image sensor used as a solid-state image sensing device includes a pixel circuit for outputting a voltage of a level corresponding to the illuminance, and an A/D converter for converting an output voltage of the pixel circuit into a digital signal. The resolution on the low illuminance side is higher than the resolution on the high illuminance side in the A/D converter. Thus, the dynamic range can be increased and the operation speed can be increased, compared to the case in which the resolution is constant independent of the illuminance.
    Type: Application
    Filed: October 18, 2014
    Publication date: April 23, 2015
    Inventors: Yasutoshi AIBARA, Fumihide MURAO
  • Publication number: 20140152879
    Abstract: There is a need to provide an AD converter capable of reducing occurrence of a noise. An AD converter includes an operational amplifier and a clip circuit. The operational amplifier receives ramp voltage and voltage for an analog signal and allows output terminal voltage to transition from an H level to an L level when a change in the ramp voltage reaches the voltage for the analog signal. The clip circuit fixes an output terminal of the operational amplifier to clipping voltage after output voltage for the operational amplifier reaches threshold voltage for a latch circuit. Therefore, the AD converter can limit a range of output voltage, as a source of noise, for the operational amplifier and eliminate an unnecessary change in the output voltage after the threshold voltage for the latch circuit is reached.
    Type: Application
    Filed: February 6, 2014
    Publication date: June 5, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Osamu NISHIKIDO, Yasutoshi Aibara, Hirokazu Shimizu, Satoshi Tatsukawa, Takayoshi Shigekura
  • Patent number: 8681032
    Abstract: There is a need to provide an AD converter capable of reducing occurrence of a noise. An AD converter includes an operational amplifier and a clip circuit. The operational amplifier receives ramp voltage and voltage for an analog signal and allows output terminal voltage to transition from an H level to an L level when a change in the ramp voltage reaches the voltage for the analog signal. The clip circuit fixes an output terminal of the operational amplifier to clipping voltage after output voltage for the operational amplifier reaches threshold voltage for a latch circuit. Therefore, the AD converter can limit a range of output voltage, as a source of noise, for the operational amplifier and eliminate an unnecessary change in the output voltage after the threshold voltage for the latch circuit is reached.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: March 25, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Osamu Nishikido, Yasutoshi Aibara, Hirokazu Shimizu, Satoshi Tatsukawa, Takayoshi Shigekura
  • Patent number: 7351946
    Abstract: An AD-converted digital video data is encoded by a difference encoding method before it is outputted and such encoded digital video data is then outputted, after it is converted to gray code or to a predetermined code in which a fixed value is added. Problems solved include noise that is generated when the AD conversion circuit outputs video data and that migrates into a CCD side via a power supply line on a printed circuit board, and noise that appears on a display image by migration into an input terminal side from an output circuit side via the power supply line and a semiconductor substrate within an AD conversion LSI.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: April 1, 2008
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Yasutoshi Aibara, Hiroki Nakajima, Eiki Imaizumi, Tatsuji Matsuura
  • Patent number: 7122775
    Abstract: An AD-converted digital video data is encoded by a difference encoding method before it is outputted and such encoded digital video data is then outputted, after it is converted to gray code or to a predetermined code in which a fixed value is added. Problems solved include noise that is generated when the AD conversion circuit outputs video data and that migrates into a CCD side via a power supply line on a printed circuit board, and noise that appears on a display image by migration into an input terminal side from an output circuit side via the power supply line and a semiconductor substrate within an AD conversion LSI.
    Type: Grant
    Filed: April 5, 2004
    Date of Patent: October 17, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI System Co., Ltd., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Yasutoshi Aibara, Hiroki Nakajima, Eiki Imaizumi, Tatsuji Matsuura