Patents by Inventor Yasutoshi Tsubota
Yasutoshi Tsubota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210183645Abstract: According to one aspect of the technique, there is provided a method of manufacturing a semiconductor device, including: (a) forming a first oxide layer by modifying a surface of a substrate at a first temperature with a plasma of a first oxygen-containing gas; and (b) forming a second oxide layer thicker than the first oxide layer by heating the substrate to a second temperature higher than the first temperature and modifying the surface of the substrate, on which the first oxide layer is formed, with a plasma of a second oxygen-containing gas.Type: ApplicationFiled: February 25, 2021Publication date: June 17, 2021Inventors: Hiroto IGAWA, Masanori NAKAYAMA, Katsunori FUNAKI, Tatsushi UEDA, Yasutoshi TSUBOTA, Eiko TAKAMI, Yuichiro TAKESHIMA, Yuki YAMAKADO
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Publication number: 20200402774Abstract: Described herein is a technique capable of suppressing sputtering on an inner peripheral surface of a process vessel when a process gas is plasma-excited in the process vessel. According to one aspect thereof, a substrate processing apparatus includes: a process vessel accommodating a process chamber where a process gas is excited into plasma; a gas supplier supplying the process gas into the process chamber; a coil wound around an outer peripheral surface of the process vessel and spaced apart therefrom, wherein a high frequency power is supplied to the coil; and an electrostatic shield disposed between the outer peripheral surface and the coil, wherein the electrostatic shield includes: a partition extending in a circumferential direction to partition between a part of the coil and the outer peripheral surface; and an opening extending in the circumferential direction and opened between another part of the coil and the outer peripheral surface.Type: ApplicationFiled: September 8, 2020Publication date: December 24, 2020Inventors: Takeshi YASUI, Katsunori FUNAKI, Yasutoshi TSUBOTA, Koichiro HARADA
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Patent number: 10796900Abstract: Described herein is a technique capable of improving electrical characteristics of a semiconductor device. According to the technique, there is provided a method of manufacturing a semiconductor device including: (a) generating oxygen and hydrogen active species; and (b) forming an oxide layer by supplying the oxygen and hydrogen active species to a substrate with a concave structure to subject a film on an inner surface of the concave structure to oxidation, wherein the oxide layer is formed in (b) such that a thickness of the oxide layer is greater on the inner surface than at an upper end portion of the concave structure by setting a ratio of a flow rate of the hydrogen active species to a total flow rate to a predetermined ratio greater than a first ratio at which a rate of forming the oxide layer is maximized at the upper end portion of the concave structure.Type: GrantFiled: July 31, 2019Date of Patent: October 6, 2020Assignee: Kokusai Electric CorporationInventors: Yuichiro Takeshima, Masanori Nakayama, Katsunori Funaki, Yasutoshi Tsubota, Hiroto Igawa
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Publication number: 20200211858Abstract: There is provided a technique that includes: loading a substrate having a metal film composed of a single metal element formed on a surface of the substrate into a process chamber; generating reactive species by plasma-exciting a processing gas containing hydrogen and oxygen; and modifying the metal film by supplying the reactive species to the substrate, wherein in the act of modifying the metal film, the metal film is modified such that a crystal grain size of the metal element constituting the metal film is larger than that before performing the act of modifying the metal film.Type: ApplicationFiled: March 12, 2020Publication date: July 2, 2020Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Masanori NAKAYAMA, Katsunori FUNAKI, Tatsushi UEDA, Yasutoshi TSUBOTA, Yuichiro TAKESHIMA, Hiroto IGAWA, Yuki YAMAKADO
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Publication number: 20200098587Abstract: There is provided a technique that includes: (a) loading a substrate including a base and a first film containing silicon and formed on the base into a process container; (b) converting a modifying gas containing helium into plasma to generate reactive species of helium; and (c) supplying the modifying gas containing the reactive species of helium to a surface of the substrate to respectively modify the first film and an interface layer of the base constituting an interface with the first film.Type: ApplicationFiled: September 13, 2019Publication date: March 26, 2020Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Yuki YAMAKADO, Masanori NAKAYAMA, Katsunori FUNAKI, Tatsushi UEDA, Yasutoshi TSUBOTA, Eiko TAKAMI, Yuichiro TAKESHIMA, Hiroto IGAWA
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Publication number: 20190355575Abstract: Described herein is a technique capable of improving electrical characteristics of a semiconductor device. According to the technique, there is provided a method of manufacturing a semiconductor device including: (a) generating oxygen and hydrogen active species; and (b) forming an oxide layer by supplying the oxygen and hydrogen active species to a substrate with a concave structure to subject a film on an inner surface of the concave structure to oxidation, wherein the oxide layer is formed in (b) such that a thickness of the oxide layer is greater on the inner surface than at an upper end portion of the concave structure by setting a ratio of a flow rate of the hydrogen active species to a total flow rate to a predetermined ratio greater than a first ratio at which a rate of forming the oxide layer is maximized at the upper end portion of the concave structure.Type: ApplicationFiled: July 31, 2019Publication date: November 21, 2019Applicant: KOKUSAI ELECTRIC CORPORATIONInventors: Yuichiro TAKESHIMA, Masanori NAKAYAMA, Katsunori FUNAKI, Yasutoshi TSUBOTA, Hiroto IGAWA
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Publication number: 20190348282Abstract: According to one aspect of the technique of the present disclosure, there is provided a method of manufacturing a semiconductor device including: (a) providing a semiconductor processing apparatus including a substrate process chamber, a coil and a substrate support; (b) placing a target substrate with a concave structure of a silicon film on a substrate support, wherein a deteriorated layer is formed on an inner surface of the concave structure by deterioration of a surface layer of the silicon film due to an etching process; (c) supplying an oxygen-containing gas into the substrate process chamber; (d) applying a high frequency power to the coil to generate plasma of the oxygen-containing gas; and (e) oxidizing, by the plasma, a surface of the silicon film exposed in the concave structure wherein the deteriorated layer is formed on the surface.Type: ApplicationFiled: July 25, 2019Publication date: November 14, 2019Inventors: Yuichiro TAKESHIMA, Masanori NAKAYAMA, Katsunori FUNAKI, Yasutoshi TSUBOTA, Hiroto IGAWA
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Patent number: 10153153Abstract: An etching fault is suppressed by use of an etching gas containing iodine heptafluoride. Provided is an attached substance removing method of removing an attached substance containing an iodine oxide attached to a component included in a chamber or a surface of a pipe connected with the chamber by use of a cleaning gas containing a fluorine-containing gas. Also provided is a dry etching method, including the steps of supplying an etching gas containing an iodine-containing gas into a chamber to perform etching on a surface of a substrate; and after the etching is performed on the surface of the substrate, removing an attached substance containing an iodine oxide attached to a component included in the chamber or a surface of a pipe connected with the chamber by use of a cleaning gas containing a fluorine-containing gas.Type: GrantFiled: March 13, 2017Date of Patent: December 11, 2018Assignee: CENTRAL GLASS COMPANY, LIMITEDInventors: Akiou Kikuchi, Masanori Watari, Kenji Kameda, Shin Hiyama, Yasutoshi Tsubota
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Patent number: 10121647Abstract: An etching fault is suppressed by use of an etching gas containing iodine heptafluoride. Provided is an attached substance removing method of removing an attached substance containing an iodine oxide attached to a component included in a chamber or a surface of a pipe connected with the chamber by use of a cleaning gas containing a fluorine-containing gas. Also provided is a dry etching method, including the steps of supplying an etching gas containing an iodine-containing gas into a chamber to perform etching on a surface of a substrate; and after the etching is performed on the surface of the substrate, removing an attached substance containing an iodine oxide attached to a component included in the chamber or a surface of a pipe connected with the chamber by use of a cleaning gas containing a fluorine-containing gas.Type: GrantFiled: March 13, 2017Date of Patent: November 6, 2018Assignee: CENTRAL GLASS COMPANY, LIMITEDInventors: Akiou Kikuchi, Masanori Watari, Kenji Kameda, Shin Hiyama, Yasutoshi Tsubota
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Patent number: 9974191Abstract: Manufacturing quality of a semiconductor device can be improved, and manufacturing throughput can be improved. A method of manufacturing a semiconductor device includes (a) placing a substrate on a substrate supporting unit installed in a processing chamber, the substrate having thereon a solder with an oxygen-containing film on a surface thereof, (b) reducing the oxygen-containing film by supplying a reducing gas into the processing chamber while maintaining a thermal conductivity of an inner atmosphere of the processing chamber at a first thermal conductivity, and (c) melting the solder by supplying a thermally conductive gas into the processing chamber while maintaining the thermal conductivity of the inner atmosphere of the processing chamber at a second thermal conductivity higher than the first thermal conductivity.Type: GrantFiled: July 22, 2015Date of Patent: May 15, 2018Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventor: Yasutoshi Tsubota
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Publication number: 20170200602Abstract: An etching fault is suppressed by use of an etching gas containing iodine heptafluoride. Provided is an attached substance removing method of removing an attached substance containing an iodine oxide attached to a component included in a chamber or a surface of a pipe connected with the chamber by use of a cleaning gas containing a fluorine-containing gas. Also provided is a dry etching method, including the steps of supplying an etching gas containing an iodine-containing gas into a chamber to perform etching on a surface of a substrate; and after the etching is performed on the surface of the substrate, removing an attached substance containing an iodine oxide attached to a component included in the chamber or a surface of a pipe connected with the chamber by use of a cleaning gas containing a fluorine-containing gas.Type: ApplicationFiled: March 13, 2017Publication date: July 13, 2017Inventors: Akiou KIKUCHI, Masanori Watari, Kenji Kameda, Shin Hiyama, Yasutoshi Tsubota
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Patent number: 9518321Abstract: Embodiments of the invention relate to apparatuses and methods for depositing materials on substrates during atomic layer deposition processes. In one embodiment, a substrate processing apparatus comprises a chamber lid assembly including a first heating member, a susceptor positioned proximal to the chamber lid assembly, wherein the susceptor includes a second heating member for heating the substrate, a process chamber accommodating at least the chamber lid assembly and the susceptor and a controller configured to control the first heating member so as to refrain the conduction of heat energy generated by the second heating member from the susceptor to the chamber lid assembly.Type: GrantFiled: September 11, 2014Date of Patent: December 13, 2016Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Mitsuro Tanabe, Yoshihiko Yanagisawa, Kazuhiro Yuasa, Masanori Sakai, Yasutoshi Tsubota
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Patent number: 9472424Abstract: The temperature of a substrate is elevated rapidly while improving the temperature uniformity of the substrate. The substrate is loaded into a process chamber, the loaded substrate is supported on a first substrate support unit, a gas is supplied to the process chamber, the temperature of the substrate supported on the first substrate support unit is elevated in a state of increasing the pressure in the process chamber to higher than the pressure during loading of the substrate or in a state of increasing the pressure in the process chamber to higher than the pressure during processing for the surface of the substrate, the substrate supported on the first substrate support unit is transferred to the second substrate support unit and supported thereon after lapse of a predetermined time, and the surface of substrate is processed while heating the substrate supported on the second substrate support unit.Type: GrantFiled: December 3, 2015Date of Patent: October 18, 2016Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Katsuyoshi Hamano, Yasutoshi Tsubota, Masayuki Tomita, Teruo Yoshino
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Publication number: 20160211151Abstract: Etching having high selectivity is performed within a plane of a substrate. To this end, a substrate processing apparatus includes a substrate support where a substrate including a first film containing at least silicon and a second film having a silicon content ratio lower than that of the first film is placed; a process chamber wherein the substrate support is disposed; a gas supply system configured to supply an etching gas to the substrate; a coolant channel disposed in the substrate support and having a coolant flowing therein; a coolant flow rate controller configured to control a flow rate of the coolant supplied to the coolant channel; a control unit configured to control at least the coolant flow rate controller such that a temperature of the substrate is maintained whereat an etch rate of the first film is higher than that of the second film while the etching gas is in contact with the substrate; and an exhaust system configured to exhaust an inner atmosphere of the process chamber.Type: ApplicationFiled: July 26, 2013Publication date: July 21, 2016Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Yasutoshi TSUBOTA, Yuichi WADA, Kenji KAMEDA, Shin HIYAMA
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Publication number: 20160155630Abstract: A method for manufacturing a semiconductor device includes: supplying a remover to a substrate including a Si-containing film on which a denatured layer is formed in order to remove the denatured layer; supplying a processing gas containing two or more halogen elements to the substrate in order to remove the Si-containing film; and supplying the remover to the substrate after the act of removing the Si-containing film in order to remove a residue of the denatured layer left after the act of removing the Si-containing film.Type: ApplicationFiled: January 27, 2016Publication date: June 2, 2016Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Yasutoshi TSUBOTA, Shin HIYAMA, Yuichi WADA, Kenji KAMEDA
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Publication number: 20160086818Abstract: The temperature of a substrate is elevated rapidly while improving the temperature uniformity of the substrate. The substrate is loaded into a process chamber, the loaded substrate is supported on a first substrate support unit, a gas is supplied to the process chamber, the temperature of the substrate supported on the first substrate support unit is elevated in a state of increasing the pressure in the process chamber to higher than the pressure during loading of the substrate or in a state of increasing the pressure in the process chamber to higher than the pressure during processing for the surface of the substrate, the substrate supported on the first substrate support unit is transferred to the second substrate support unit and supported thereon after lapse of a predetermined time, and the surface of substrate is processed while heating the substrate supported on the second substrate support unit.Type: ApplicationFiled: December 3, 2015Publication date: March 24, 2016Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Katsuyoshi HAMANO, Yasutoshi TSUBOTA, Masayuki TOMITA, Teruo YOSHINO
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Publication number: 20160079101Abstract: The present invention provides a structure and a technique through which a reaction heat generated in a substrate process can be absorbed in a low temperature range and a temperature of a substrate support (susceptor) can remain at a predetermined temperature or less. There is provided a substrate processing apparatus including: a substrate support including a heater and a cooling channel; a heater power supply; a thermal detector; a coolant supply unit; a controller configured to control the heater power supply and the coolant supply unit to: supply a first power to the heater without a substrate placed on the substrate support while supplying the coolant to the cooling channel; and supply a second power to the heater with the substrate placed on the substrate support while supplying the coolant to the cooling channel.Type: ApplicationFiled: September 9, 2015Publication date: March 17, 2016Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Hidehiro YANAI, Yoshihiko YANAGISAWA, Yasutoshi TSUBOTA
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Publication number: 20160032457Abstract: Embodiments of the invention relate to apparatuses and methods for depositing materials on substrates during atomic layer deposition processes. In one embodiment, a substrate processing apparatus comprises a chamber lid assembly including a first heating member, a susceptor positioned proximal to the chamber lid assembly, wherein the susceptor includes a second heating member for heating the substrate, a process chamber accommodating at least the chamber lid assembly and the susceptor and a controller configured to control the first heating member so as to refrain the conduction of heat energy generated by the second heating member from the susceptor to the chamber lid assembly.Type: ApplicationFiled: September 11, 2014Publication date: February 4, 2016Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Mitsuro TANABE, Yoshihiko YANAGISAWA, Kazuhiro YUASA, Masanori SAKAI, Yasutoshi TSUBOTA
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Patent number: 9236246Abstract: The temperature of a substrate is elevated rapidly while improving the temperature uniformity of the substrate. The substrate is loaded into a process chamber, the loaded substrate is supported on a first substrate support unit, a gas is supplied to the process chamber, the temperature of the substrate supported on the first substrate support unit is elevated in a state of increasing the pressure in the process chamber to higher than the pressure during loading of the substrate or in a state of increasing the pressure in the process chamber to higher than the pressure during processing for the surface of the substrate, the substrate supported on the first substrate support unit is transferred to the second substrate support unit and supported thereon after lapse of a predetermined time, and the surface of substrate is processed while heating the substrate supported on the second substrate support unit.Type: GrantFiled: March 1, 2012Date of Patent: January 12, 2016Assignee: HITACHI KOKUSAI ELECTRIC INC.Inventors: Katsuyoshi Hamano, Yasutoshi Tsubota, Masayuki Tomita, Teruo Yoshino
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Publication number: 20150334849Abstract: Manufacturing quality of a semiconductor device can be improved, and manufacturing throughput can be improved. A method of manufacturing a semiconductor device includes (a) placing a substrate on a substrate supporting unit installed in a processing chamber, the substrate having thereon a solder with an oxygen-containing film on a surface thereof, (b) reducing the oxygen-containing film by supplying a reducing gas into the processing chamber while maintaining a thermal conductivity of an inner atmosphere of the processing chamber at a first thermal conductivity, and (c) melting the solder by supplying a thermally conductive gas into the processing chamber while maintaining the thermal conductivity of the inner atmosphere of the processing chamber at a second thermal conductivity higher than the first thermal conductivity.Type: ApplicationFiled: July 22, 2015Publication date: November 19, 2015Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventor: Yasutoshi TSUBOTA