Patents by Inventor Yasutsugu Soeta

Yasutsugu Soeta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7776719
    Abstract: A method is provided for manufacturing a bonded wafer by an ion implantation delamination method, including bonding a base wafer with a bond wafer having a microbubble layer formed by ion implantation, delaminating the wafers along the micro bubble layer as a boundary, and removing a periphery of a thin film formed on the base wafer by the delamination. The removal step is performed by dry etching that supplies an etching gas from a nozzle, and the dry etching is performed by adjusting an inner diameter of the gas-jetting port of the nozzle, and a distance between the gas-jetting port of the nozzle and a surface of the thin film.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: August 17, 2010
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Yasutsugu Soeta, Nobuhiko Noto
  • Patent number: 7677957
    Abstract: The present invention is a polishing pad used for polishing a semiconductor substrate, wherein, at least, grooves having a radial pattern are formed on a surface of the polishing pad, and so that a groove depth of the groove parts located nearer to the center than the substrate is shallower than a groove depth of the groove parts existing immediately below the substrate, and an intersection point where the grooves overlap each other at the central part of the radial pattern of the grooves does not exist immediately below the substrate. A method for processing the pad, and a method for producing a substrate using this pad are also disclosed.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: March 16, 2010
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Yasutsugu Soeta
  • Patent number: 7591713
    Abstract: The present invention is a polishing pad used for polishing a semiconductor substrate, wherein, at least, grooves having a radial pattern are formed on a surface of the polishing pad, and (an average value of the sum totals of the groove volumes in parts immediately below the substrate/area of the substrate) is 0.06 to 0.23, or the grooves are formed so that a groove depth of the groove parts located nearer to the center than the substrate is shallower than a groove depth of the groove parts existing immediately below the substrate, and an intersection point where the grooves overlap each other at the central part of the radial pattern of the grooves does not exist immediately below the substrate, a method for processing it, and a method for producing a substrate using this.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: September 22, 2009
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Yasutsugu Soeta
  • Publication number: 20090170285
    Abstract: The present invention provides a method for manufacturing a bonded wafer by an ion implantation delamination method, the method including at least the steps of bonding a base wafer with a bond wafer having a microbubble layer formed by ion implantation, delaminating the wafers along the micro bubble layer as a boundary, and removing a periphery of a thin film formed on the base wafer by the delamination step, wherein at least the thin-film periphery removal step after the delamination step is performed by dry etching that supplies an etching gas from a nozzle, and the dry etching is performed by adjusting an inner diameter of the gas-jetting port of the nozzle, and a distance between the gas-jetting port of the nozzle and a surface of the thin film.
    Type: Application
    Filed: May 14, 2007
    Publication date: July 2, 2009
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Yasutsugu Soeta, Nobuhiko Noto
  • Publication number: 20090117706
    Abstract: There is provided a method of manufacturing an SOI wafer by an ion implantation delamination method, comprising at least: forming an oxide film on a surface of at least one of a base wafer and a bond wafer functioning as an SOI layer; implanting at least one of a hydrogen ion and a rare gas ion from a surface of the bond wafer to form an ion implanted layer; subsequently bringing the bond wafer into close contact with the base wafer via the oxide film; performing a heat treatment to cause delamination in the ion implanted layer so that the SOI layer is formed; then conducing a heat treatment in an oxidizing atmosphere to form an oxide film on the surface of the SOI layer; subsequently removing the oxide film by etching; then cleaning the surface of the SOI layer by using ozone water; and polishing the same.
    Type: Application
    Filed: April 4, 2006
    Publication date: May 7, 2009
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Yasutsugu Soeta, Yasuo Nagaoka
  • Publication number: 20080139094
    Abstract: The present invention is a polishing pad used for polishing a semiconductor substrate, wherein, at least, grooves having a radial pattern are formed on a surface of the polishing pad, and so that a groove depth of the groove parts located nearer to the center than the substrate is shallower than a groove depth of the groove parts existing immediately below the substrate, and an intersection point where the grooves overlap each other at the central part of the radial pattern of the grooves does not exist immediately below the substrate. A method for processing the pad, and a method for producing a substrate using this pad are also disclosed.
    Type: Application
    Filed: January 2, 2008
    Publication date: June 12, 2008
    Applicant: Shin-Etsu Handotai Co., Ltd.
    Inventor: Yasutsugu Soeta
  • Publication number: 20070032175
    Abstract: The present invention is a polishing pad used for polishing a semiconductor substrate, wherein, at least, grooves having a radial pattern are formed on a surface of the polishing pad, and (an average value of the sum totals of the groove volumes in parts immediately below the substrate/area of the substrate) is 0.06 to 0.23, or the grooves are formed so that a groove depth of the groove parts located nearer to the center than the substrate is shallower than a groove depth of the groove parts existing immediately below the substrate, and an intersection point where the grooves overlap each other at the central part of the radial pattern of the grooves does not exist immediately below the substrate, a method for processing it, and a method for producing a substrate using this.
    Type: Application
    Filed: September 17, 2004
    Publication date: February 8, 2007
    Applicant: Shin-Etsu Handotai Co., Ltd.
    Inventor: Yasutsugu Soeta