Patents by Inventor Yasuyo Sogawa

Yasuyo Sogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit device and method for designing the same
    Publication number: 20090065889
    Abstract: A semiconductor integrated circuit device has a basic cell structure which allows avoidance of wiring congestion of signal lines or the like. The semiconductor integrated circuit device comprises a plurality of basic cells having predetermined functions, respectively, which are configured by connecting semiconductor elements via wirings. Each of the basic cells has a polygonal shape when viewed from the top. Moreover, a power source line is provided in an inner portion of the basic cell.
    Type: Application
    Filed: October 11, 2007
    Publication date: March 12, 2009
    Inventor: Yasuyo Sogawa
  • Semiconductor integrated circuit
    Publication number: 20060258135
    Abstract: Each of plural semiconductor integrated circuits existing on a semiconductor wafer is provided with a function circuit (3), plural pads (4), and wirings (8) which are electrically connected to the pads (4) and contact bumps of a probe card (7), wherein at least two wirings (8a) and (8b) simultaneously contact one bump (6) in an area other than a bump area, without being in touch with each other, whereby wafer level burn-in is executed. Thereby, even when the chip area is reduced, wafer level burn-in can be carried out.
    Type: Application
    Filed: August 31, 2004
    Publication date: November 16, 2006
    Applicant: Matsushita Electtric Industrial Co., Ltd.
    Inventors: Yasuyo Sogawa, Kazuhiko Nishikawa, Masanori Hirofuji