Patents by Inventor Yasuyoshi Kuwazoe

Yasuyoshi Kuwazoe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190158732
    Abstract: The present technology relates to an imaging device, an imaging method, and a program which are capable of setting a resolution based on a distance to a subject. A control unit which changes a resolution of a captured image on the basis of distance information, corresponding to the captured image, regarding a detected distance to a subject included in the image is included. The control unit changes a resolution of a portion of a region of the captured image on the basis of the distance information. The portion of the region is a region distant from another region. The control unit changes the resolution of the portion of the region such that the portion of the region becomes higher than a resolution of another region. The control unit sets a resolution of the subject to be high in a case in which the distance to the subject is longer than a predetermined reference, and sets the resolution of the subject to be low in a case in which the distance to the subject is smaller than the predetermined reference.
    Type: Application
    Filed: June 14, 2017
    Publication date: May 23, 2019
    Applicant: SONY CORPORATION
    Inventors: Kazuhiro SHIMAUCHI, Kenzaburo SEKI, Tetsuya SHIMODA, Yasuyoshi KUWAZOE, Yuta NAKAO, Takashi KOHASHI
  • Publication number: 20180278872
    Abstract: There is provided an image sensor, including a plurality of phase difference lines in which a plurality of pixels including phase difference pixels for detecting a phase difference are arranged, a plurality of normal lines in which a plurality of normal pixels not including the phase difference pixels are arranged, a row scanning section which selects each of the plurality of phase difference lines and each of the plurality of normal lines within a first period, and selects each of the plurality of phase difference lines within a second period different from the first period, and a column scanning section which outputs pixel values of the plurality of normal pixels in each of the lines selected within the first period, and outputs pixel values of the phase difference pixels in each of the lines selected within the second period.
    Type: Application
    Filed: May 30, 2018
    Publication date: September 27, 2018
    Applicant: Sony Corporation
    Inventor: Yasuyoshi Kuwazoe
  • Patent number: 10009563
    Abstract: There is provided an image sensor, including a plurality of phase difference lines in which a plurality of pixels including phase difference pixels for detecting a phase difference are arranged, a plurality of normal lines in which a plurality of normal pixels not including the phase difference pixels are arranged, a row scanning section which selects each of the plurality of phase difference lines and each of the plurality of normal lines within a first period, and selects each of the plurality of phase difference lines within a second period different from the first period, and a column scanning section which outputs pixel values of the plurality of normal pixels in each of the lines selected within the first period, and outputs pixel values of the phase difference pixels in each of the lines selected within the second period.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: June 26, 2018
    Assignee: Sony Corporation
    Inventor: Yasuyoshi Kuwazoe
  • Patent number: 9055229
    Abstract: To be provided is a control circuit including a horizontal synchronization clock counting unit that counts the number of clock cycles of a horizontal synchronization clock signal for instructing a timing of starting scanning pixels in a horizontal direction of a pixel group arranged in a two-dimensional lattice shape, so as to be used as a horizontal synchronization clock count value, a high frequency clock counting unit that counts the number of clock cycles of a high frequency clock signal with a higher frequency than the horizontal synchronization clock signal, so as to be used as a high frequency clock count value, and a timing determination unit that determines timings of starting and ending exposure for the pixels on the basis of the horizontal synchronization clock count value and the high frequency clock count value.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: June 9, 2015
    Assignee: SONY CORPORATION
    Inventor: Yasuyoshi Kuwazoe
  • Patent number: 8654222
    Abstract: An imaging device includes a main image sensor configured to obtain an image used for recording, a sub-image sensor configured to obtain a live view image, an input switching unit, and a signal processor. The input switching unit receives a plurality of sensor outputs including an output of the main image sensor and an output of the sub-image sensor, switches the plurality of received sensor outputs in a time-division manner, and outputs time-division switched signals of the plurality of sensor outputs to the signal processor. The signal processor receives the time-division switched signals from the input switching unit, and executes signal processing on the received time-division switched signals.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: February 18, 2014
    Assignee: Sony Corporation
    Inventor: Yasuyoshi Kuwazoe
  • Publication number: 20130335607
    Abstract: To be provided is a control circuit including a horizontal synchronization clock counting unit that counts the number of clock cycles of a horizontal synchronization clock signal for instructing a timing of starting scanning pixels in a horizontal direction of a pixel group arranged in a two-dimensional lattice shape, so as to be used as a horizontal synchronization clock count value, a high frequency clock counting unit that counts the number of clock cycles of a high frequency clock signal with a higher frequency than the horizontal synchronization clock signal, so as to be used as a high frequency clock count value, and a timing determination unit that determines timings of starting and ending exposure for the pixels on the basis of the horizontal synchronization clock count value and the high frequency clock count value.
    Type: Application
    Filed: April 18, 2013
    Publication date: December 19, 2013
    Applicant: Sony Corporation
    Inventor: Yasuyoshi KUWAZOE
  • Publication number: 20130293736
    Abstract: There is provided an image sensor, including a plurality of phase difference lines in which a plurality of pixels including phase difference pixels for detecting a phase difference are arranged, a plurality of normal lines in which a plurality of normal pixels not including the phase difference pixels are arranged, a row scanning section which selects each of the plurality of phase difference lines and each of the plurality of normal lines within a first period, and selects each of the plurality of phase difference lines within a second period different from the first period, and a column scanning section which outputs pixel values of the plurality of normal pixels in each of the lines selected within the first period, and outputs pixel values of the phase difference pixels in each of the lines selected within the second period.
    Type: Application
    Filed: April 9, 2013
    Publication date: November 7, 2013
    Inventor: Yasuyoshi Kuwazoe
  • Publication number: 20090244310
    Abstract: An imaging device includes a main image sensor configured to obtain an image used for recording, a sub-image sensor configured to obtain a live view image, an input switching unit, and a signal processor. The input switching unit receives a plurality of sensor outputs including an output of the main image sensor and an output of the sub-image sensor, switches the plurality of received sensor outputs in a time-division manner, and outputs time-division switched signals of the plurality of sensor outputs to the signal processor. The signal processor receives the time-division switched signals from the input switching unit, and executes signal processing on the received time-division switched signals.
    Type: Application
    Filed: March 16, 2009
    Publication date: October 1, 2009
    Applicant: Sony Corporation
    Inventor: Yasuyoshi Kuwazoe
  • Patent number: 7349467
    Abstract: The invention provides a data decoding apparatus and method by which the data rate can be discriminated at a high speed using a Viterbi decoding process. Receive data are successively Viterbi decoded beginning with the top thereof. At a point of time when receive data which may possibly be end bit position data required for data rate discrimination are Viterbi decoded, data necessary for the data rate discrimination are successively extracted, and the data rate is discriminated based on the extracted necessary data.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: March 25, 2008
    Assignee: Sony Corporation
    Inventor: Yasuyoshi Kuwazoe
  • Patent number: 7003717
    Abstract: A decoding apparatus, decoding method, data-receiving apparatus, and a data-receiving method for performing a maximum-likelihood decoding process based on a Viterbi algorithm on a data train completing a convolution-encoding process. The apparatus includes a computation device for performing a trellis computation for decoding a data train completing the convolution-encoding process. The decoding apparatus further includes a control device for controlling the trellis computation to be carried out by the computation device with processing timings in processing units each corresponding to a process carried out on n bits of pre-encoding data, in which each of the processing units is parallel processing carried out on computation results obtained for 2n states with one of the processing timings immediately preceding a present one of the processing timings to find the computation results with the present processing timing for the 2n states.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: February 21, 2006
    Assignee: Sony Corporation
    Inventors: Yasuyoshi Kuwazoe, Taku Nagase
  • Patent number: 7003328
    Abstract: A mobile telephone includes an expansion slot to which an expansion display unit is attached by insertion in a way as to be capable of being taken out and put in freely. The expansion display unit is provided with an expansion display section having a display surface larger than that of the main body display section of the mobile telephone. The mobile telephone then displays information on the expansion display section. The large display surface of the expansion display section can display most of the contents of the information to be displayed collectively, which makes it easy to confirm the contents of the information to be displayed and improves the usability of the mobile telephone.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: February 21, 2006
    Assignee: Sony Corporation
    Inventor: Yasuyoshi Kuwazoe
  • Publication number: 20050172211
    Abstract: The invention provides a data decoding apparatus and method by which the data rate can be discriminated at a high speed using a Viterbi decoding process. Receive data are successively Viterbi decoded beginning with the top thereof. At a point of time when receive data which may possibly be end bit position data required for data rate discrimination are Viterbi decoded, data necessary for the data rate discrimination are successively extracted, and the data rate is discriminated based on the extracted necessary data.
    Type: Application
    Filed: March 25, 2005
    Publication date: August 4, 2005
    Inventor: Yasuyoshi Kuwazoe
  • Publication number: 20050157824
    Abstract: A decoding apparatus, decoding method, data-receiving apparatus, and a data-receiving method for performing a maximum-likelihood decoding process based on a Viterbi algorithm on a data train completing a convolution-encoding process. The apparatus includes a computation device for performing a trellis computation for decoding a data train completing the convolution-encoding process. The decoding apparatus further includes a control device for controlling the trellis computation to be carried out by the computation device with processing timings in processing units each corresponding to a process carried out on n bits of pre-encoding data, in which each of the processing units is parallel processing carried out on computation results obtained for 2n states with one of the processing timings immediately preceding a present one of the processing timings to find the computation results with the present processing timing for the 2n states.
    Type: Application
    Filed: March 10, 2005
    Publication date: July 21, 2005
    Inventors: Yasuyoshi Kuwazoe, Taku Nagase
  • Patent number: 6886128
    Abstract: A decoding apparatus, decoding method, data-receiving apparatus, and a data-receiving method for performing a maximum-likelihood decoding process based on a Viterbi algorithm on a data train completing a convolution-encoding process. The apparatus includes a computation device for performing a trellis computation for decoding a data train completing the convolution-encoding process. The decoding apparatus further includes a control device for controlling the trellis computation to be carried out by the computation device with processing timings in processing units each corresponding to a process carried out on n bits of pre-encoding data, in which each of the processing units is parallel processing carried out on computation results obtained for 2n states with one of the processing timings immediately preceding a present one of the processing timings to find the computation results with the present processing timing for the 2n states.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: April 26, 2005
    Assignee: Sony Corporation
    Inventors: Yasuyoshi Kuwazoe, Taku Nagase
  • Patent number: 6885701
    Abstract: The invention provides a data decoding apparatus and method by which the data rate can be discriminated at a high speed using a Viterbi decoding process. Receive data are successively Viterbi decoded beginning with the top thereof. At a point of time when receive data which may possibly be end bit position data required for data rate discrimination are Viterbi decoded, data necessary for the data rate discrimination are successively extracted, and the data rate is discriminated based on the extracted necessary data.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: April 26, 2005
    Assignee: Sony Corporation
    Inventor: Yasuyoshi Kuwazoe
  • Publication number: 20030153363
    Abstract: A mobile telephone includes an expansion slot to which the expansion stick of an expansion display unit is attached by insertion in the manner capable of being taken out and put in freely. The expansion display unit is provided with an expansion display section having a display surface larger than that of the main body display section of the mobile telephone. The mobile telephone makes the expansion display section display information to be displayed. The large display surface of the expansion display section can display much part of the contents of the information to be displayed collectively, which makes it easy to confirm the contents of the information to be displayed and improves the usability of the mobile telephone.
    Type: Application
    Filed: February 3, 2003
    Publication date: August 14, 2003
    Inventor: Yasuyoshi Kuwazoe
  • Publication number: 20030153283
    Abstract: In a mobile phone which displays a target information item after sequentially displaying selected information items from an uppermost level to lower levels of a hierarchical tree structure in which a variety of items are classified in accordance with a user's operation, an information item with a high priority for each user is made to be found easily. A main LCD, a sub LCD and a microcomputer for controlling display on the main LCD and the sub LCD are provided. The microcomputer controls so that an information item selected by the user among information items displayed on the main LCD at a time of display selection is always displayed on the sub LCD.
    Type: Application
    Filed: January 9, 2003
    Publication date: August 14, 2003
    Inventor: Yasuyoshi Kuwazoe
  • Publication number: 20020078419
    Abstract: Disclosed herein are decoding apparatus, decoding method, data-receiving apparatus and data-receiving method. In a decoding apparatus for carrying out a maximum-likelihood decoding process based on a Viterbi algorithm on a data train completing a convolution-encoding process, the decoding apparatus includes computation means for carrying out a trellis computation for decoding a data train completing the convolution-encoding process. The decoding apparatus further includes control means for controlling the trellis computation so as to be carried out by the computation means with processing timings in processing units each corresponding to a process carried out on n bits of pre-encoding data, in which each of the processing units is parallel processing carried out on computation results obtained for 2n states with one of the processing timings, which immediately precedes a present one of the processing timings, to find computation results with the present processing timing for the 2n states.
    Type: Application
    Filed: November 19, 2001
    Publication date: June 20, 2002
    Inventors: Yasuyoshi Kuwazoe, Taku Nagase
  • Publication number: 20020051505
    Abstract: The invention provides a data decoding apparatus and method by which the data rate can be discriminated at a high speed using a Viterbi decoding process. Receive data are successively Viterbi decoded beginning with the top thereof. At a point of time when receive data which may possibly be end bit position data required for data rate discrimination are Viterbi decoded, data necessary for the data rate discrimination are successively extracted, and the data rate is discriminated based on the extracted necessary data.
    Type: Application
    Filed: August 30, 2001
    Publication date: May 2, 2002
    Inventor: Yasuyoshi Kuwazoe