Patents by Inventor Yasuyoshi Matsuda

Yasuyoshi Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5790419
    Abstract: A system is provided to automatically terminate a fail-safe state. When an abnormality detection signal of Lo and a pulse having a frequency outside a specified range are input to set and reset terminals S, R of an R-S Flip-Flop (R-SFF) 24, respectively, a microcomputer 14 is determined to be in its abnormal state and an output of Hi is output from a Q output terminal of the R-SFF 24 to stop the operation of a motor 20. In this way, a so-called fail-safe state is established. When the abnormality detection signal of Hi and the pulse having a frequency within the specified range are input to the set and reset terminals S, R of the R-SFF 24, respectively, the microcomputer 14 is determined to have returned to its normal state and an output of Lo is output from the Q output terminal of the R-SFF 24 to resume the operation of the motor 20. Thus, the operation of the motor 20 can be controlled according to the operation of a power window switch 16.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: August 4, 1998
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventors: Yasuyoshi Matsuda, Naohiro Nakatsuji