Patents by Inventor Yasuyuki Fujiwara
Yasuyuki Fujiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240056071Abstract: A semiconductor device that normally-off drives a first transistor that normally-on drives, the semiconductor device includes a first circuitry, a second circuitry, and a first diode. The first circuitry that is connected with a power supply voltage and a ground voltage, detects the power supply voltage, and outputs a transition state of the power supply voltage. The second circuitry that is connected with the power supply voltage, the ground voltage, the first circuitry, and a second transistor, and outputs a drive voltage of a second transistor connected in series with the first transistor, based on an output of the first circuitry. The first diode having an anode connected with a drive terminal of the first transistor and a cathode connected with an output terminal of the second transistor.Type: ApplicationFiled: October 25, 2023Publication date: February 15, 2024Inventors: Yasuyuki FUJIWARA, Yiyao LIU, Yusuke SATO, Naotsugu KAKO, Hideaki MAJIMA
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Patent number: 11852659Abstract: A current detection device of an embodiment includes a conductor, a first magnetic field detector, a second magnetic field detector, and a conductive film. The conductor includes a first region, a second region, and a third region connecting an edge of the first region and an edge of the second region. The first magnetic field detector is disposed between the first and second regions. The second magnetic field detector is disposed opposite to the first magnetic field detector with respect to the third region. The conductive film is bonded to a conductor layer including a slit having a width larger than each of widths of magneto-sensitive parts of the first and second magnetic field detectors and covers the slit, the conductor layer being provided between the conductor and each of the first and second magnetic field detectors.Type: GrantFiled: February 24, 2022Date of Patent: December 26, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Jia Liu, Yasuyuki Fujiwara
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Patent number: 11838013Abstract: A semiconductor device that normally-off drives a first transistor that normally-on drives, the semiconductor device includes a first circuitry, a second circuitry, and a first diode. The first circuitry that is connected with a power supply voltage and a ground voltage, detects the power supply voltage, and outputs a transition state of the power supply voltage. The second circuitry that is connected with the power supply voltage, the ground voltage, the first circuitry, and a second transistor, and outputs a drive voltage of a second transistor connected in series with the first transistor, based on an output of the first circuitry. The first diode having an anode connected with a drive terminal of the first transistor and a cathode connected with an output terminal of the second transistor.Type: GrantFiled: May 31, 2022Date of Patent: December 5, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Yasuyuki Fujiwara, Yiyao Liu, Yusuke Sato, Naotsugu Kako, Hideaki Majima
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Publication number: 20230078354Abstract: A current detection device of an embodiment includes a conductor, a first magnetic field detector, a second magnetic field detector, and a conductive film. The conductor includes a first region, a second region, and a third region connecting an edge of the first region and an edge of the second region. The first magnetic field detector is disposed between the first and second regions. The second magnetic field detector is disposed opposite to the first magnetic field detector with respect to the third region. The conductive film is bonded to a conductor layer including a slit having a width larger than each of widths of magneto-sensitive parts of the first and second magnetic field detectors and covers the slit, the conductor layer being provided between the conductor and each of the first and second magnetic field detectors.Type: ApplicationFiled: February 24, 2022Publication date: March 16, 2023Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Jia LIU, Yasuyuki FUJIWARA
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Publication number: 20220294443Abstract: A semiconductor device that normally-off drives a first transistor that normally-on drives, the semiconductor device includes a first circuitry, a second circuitry, and a first diode. The first circuitry that is connected with a power supply voltage and a ground voltage, detects the power supply voltage, and outputs a transition state of the power supply voltage. The second circuitry that is connected with the power supply voltage, the ground voltage, the first circuitry, and a second transistor, and outputs a drive voltage of a second transistor connected in series with the first transistor, based on an output of the first circuitry. The first diode having an anode connected with a drive terminal of the first transistor and a cathode connected with an output terminal of the second transistor.Type: ApplicationFiled: May 31, 2022Publication date: September 15, 2022Inventors: Yasuyuki Fujiwara, Yiyao Liu, Yusuke Sato, Naotsugu Kako, Hideaki Majima
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Patent number: 11381237Abstract: A semiconductor device that normally-off drives a first transistor that normally-on drives, the semiconductor device includes a first circuitry, a second circuitry, and a first diode. The first circuitry that is connected with a power supply voltage and a ground voltage, detects the power supply voltage, and outputs a transition state of the power supply voltage. The second circuitry that is connected with the power supply voltage, the ground voltage, the first circuitry, and a second transistor, and outputs a drive voltage of a second transistor connected in series with the first transistor, based on an output of the first circuitry. The first diode having an anode connected with a drive terminal of the first transistor and a cathode connected with an output terminal of the second transistor.Type: GrantFiled: March 17, 2021Date of Patent: July 5, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Yasuyuki Fujiwara, Yiyao Liu, Yusuke Sato, Naotsugu Kako, Hideaki Majima
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Publication number: 20220094353Abstract: A semiconductor device that normally-off drives a first transistor that normally-on drives, the semiconductor device includes a first circuitry, a second circuitry, and a first diode. The first circuitry that is connected with a power supply voltage and a ground voltage, detects the power supply voltage, and outputs a transition state of the power supply voltage. The second circuitry that is connected with the power supply voltage, the ground voltage, the first circuitry, and a second transistor, and outputs a drive voltage of a second transistor connected in series with the first transistor, based on an output of the first circuitry. The first diode having an anode connected with a drive terminal of the first transistor and a cathode connected with an output terminal of the second transistor.Type: ApplicationFiled: March 17, 2021Publication date: March 24, 2022Inventors: Yasuyuki Fujiwara, Yiyao Liu, Yusuke Sato, Naotsugu Kako, Hideaki Majima
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Patent number: 10280530Abstract: To provide a single crystal production apparatus that is capable of prolonging the lifetime of a heater, and capable of reducing the cost. A single crystal production apparatus of the present invention is the single crystal production apparatus which produces a single crystal of a metal oxide in an oxidative atmosphere, containing: a base body; a cylindrical furnace body having heat resistance disposed above the base body; a lid member occluding the furnace body; a heater disposed inside the furnace body; a high frequency coil heating the heater through high frequency induction heating; and a crucible heated with the heater, the heater containing a Pt-based alloy and having a zirconia coating on an overall surface of the heater.Type: GrantFiled: January 10, 2018Date of Patent: May 7, 2019Assignees: FUJIKOSHI MACHINERY CORP., SHINSHU UNIVERSITYInventors: Keigo Hoshikawa, Yasuyuki Fujiwara, Keiichi Kohama, Shinji Nakanishi, Takumi Kobayashi, Etsuko Ohba
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Publication number: 20180251908Abstract: To provide a single crystal production apparatus that is capable of prolonging the lifetime of a heater, and capable of reducing the cost. A single crystal production apparatus of the present invention is the single crystal production apparatus which produces a single crystal of a metal oxide in an oxidative atmosphere, containing: a base body; a cylindrical furnace body having heat resistance disposed above the base body; a lid member occluding the furnace body; a heater disposed inside the furnace body; a high frequency coil heating the heater through high frequency induction heating; and a crucible heated with the heater, the heater containing a Pt-based alloy and having a zirconia coating on an overall surface of the heater.Type: ApplicationFiled: January 10, 2018Publication date: September 6, 2018Inventors: Keigo HOSHIKAWA, Yasuyuki Fujiwara, Keiichi Kohama, Shinji Nakanishi, Takumi Kobayashi, Etsuko Ohba
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Patent number: 9975771Abstract: A method for obtaining high-purity phosphorus pentafluoride (PF5), which is industrially useful in the fields of semiconductors and batteries, from PF5 containing a gas mixture of HCl, HF, and so on. Specifically, provided is a process for purifying phosphorus pentafluoride including (1) an immobilization step in which phosphorus pentafluoride containing a mixture is brought into contact with a metal fluoride (MFn; M is an n-valent metal) having a specific surface area of 1.0 m2/g or more at 40° to 150° C. to immobilize phosphorus pentafluoride in the form of a hexafluorophosphate (M(PF6)n), (2) a separation step in which the mixture remaining in the gas phase is expelled out of the reaction system to separate the mixture from the hexafluorophosphate, and (3) a heat-decomposition step in which the hexafluorophosphate freed of the mixture is heated at 150° to 400° C. under a pressure of ?0.1 to 0.1 MPa·G to give phosphorus pentafluoride.Type: GrantFiled: September 26, 2014Date of Patent: May 22, 2018Assignee: KANTO DENKA KOGYO CO., LTD.Inventors: Katsuhiro Saito, Shinji Mita, Hiromi Oya, Shinsuke Katayama, Yasuyuki Fujiwara, Ichiro Morimoto, Hiroyuki Uehara, Norihisa Kimura
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Publication number: 20160244331Abstract: A method for obtaining high-purity phosphorus pentafluoride (PF5), which is industrially useful in the fields of semiconductors and batteries, from PF5 containing a gas mixture of HCl, HF, and so on. Specifically, provided is a process for purifying phosphorus pentafluoride including (1) an immobilization step in which phosphorus pentafluoride containing a mixture is brought into contact with a metal fluoride (MFn; M is an n-valent metal) having a specific surface area of 1.0 m2/g or more at 40° to 150° C. to immobilize phosphorus pentafluoride in the form of a hexafluorophosphate (M(PF6)n), (2) a separation step in which the mixture remaining in the gas phase is expelled out of the reaction system to separate the mixture from the hexafluorophosphate, and (3) a heat-decomposition step in which the hexafluorophosphate freed of the mixture is heated at 150° to 400° C. under a pressure of ?0.1 to 0.1 MPa·G to give phosphorus pentafluoride.Type: ApplicationFiled: September 26, 2014Publication date: August 25, 2016Inventors: Katsuhiro SAITO, Shinji MITA, Hiromi OYA, Shinsuke KATAYAMA, Yasuyuki FUJIWARA, Ichiro MORIMOTO, Hiroyuki UEHARA, Norihisa KIMURA
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Patent number: 9419600Abstract: A PWM signal generation circuit according to the present invention includes a duty setting unit (10) configured to generate a duty control signal designating a duty ratio corresponding to each period of a PWM signal on the basis of an initial duty setting signal, a target duty setting signal, a slope setting signal, and a clock signal, a period setting unit (20) configured to output a period setting value, and an output control unit (30) configured to generate the PWM signal having a period corresponding to the period setting value and having a duty ratio corresponding to a value of the duty control signal. The duty setting unit (10) increases the value of the initial duty ratio to the value of the target duty ratio each time the number of a clock pulse of the clock signal reaches the period setting value reaches the slope setting value.Type: GrantFiled: December 9, 2014Date of Patent: August 16, 2016Assignee: Renesas Electronics CorporationInventor: Yasuyuki Fujiwara
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Patent number: 9157171Abstract: A method for producing n-type SiC single crystal, including: adding gallium and nitrogen, which is a donor element, for obtaining an n-type semiconductor during crystal growth of SiC single crystal, such that the amount of nitrogen as represented in atm unit is greater than the amount of gallium as represented in atm unit; an n-type SiC single crystal obtained according to this production method; and, a semiconductor device that includes the n-type SiC single crystal.Type: GrantFiled: February 18, 2010Date of Patent: October 13, 2015Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Akinori Seki, Yasuyuki Fujiwara
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Publication number: 20150244021Abstract: Provided is a solid electrolyte single crystal having a perovskite structure and a producing method thereof. Provided is a method for producing a solid electrolyte single crystal having a perovskite structure including: a heating step of heating a raw material for producing a single crystal of a solid electrolyte having a perovskite structure to a temperature of a melting point of the solid electrolyte or more to obtain a molten body; and a cooling step of cooling the obtained molten body to a temperature of a solidifying point of the solid electrolyte or less, and the solid electrolyte single crystal having a perovskite structure produced by the method.Type: ApplicationFiled: August 29, 2013Publication date: August 27, 2015Applicants: SHINSHU UNIVERSITY, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yasuyuki Fujiwara, Keigo Hoshikawa
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Patent number: 9080254Abstract: In a method of producing a SiC single crystal, the SiC single crystal is grown on a SiC seed crystal by bringing the SiC seed crystal, which is fixed at a rotatable seed crystal fixing shaft, into contact with a solution produced by dissolving carbon in melt containing silicon in a rotatable crucible. The method includes starting rotation of the seed crystal fixing shaft, and starting rotation of the crucible after a predetermined delay time (Td); then stopping the rotation of the seed crystal fixing shaft and the rotation of the crucible simultaneously; then stopping the seed crystal fixing shaft and the crucible for a predetermined stop time (Ts); and repeating a rotation/stop cycle.Type: GrantFiled: March 11, 2010Date of Patent: July 14, 2015Assignee: Toyota Jidosha Kabushiki KaishaInventors: Hidemitsu Sakamoto, Hironori Daikoku, Yasuyuki Fujiwara
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Publication number: 20150145574Abstract: A PWM signal generation circuit according to the present invention includes a duty setting unit (10) configured to generate a duty control signal designating a duty ratio corresponding to each period of a PWM signal on the basis of an initial duty setting signal, a target duty setting signal, a slope setting signal, and a clock signal, a period setting unit (20) configured to output a period setting value, and an output control unit (30) configured to generate the PWM signal having a period corresponding to the period setting value and having a duty ratio corresponding to a value of the duty control signal. The duty setting unit (10) increases the value of the initial duty ratio to the value of the target duty ratio each time the number of a clock pulse of the clock signal reaches the period setting value reaches the slope setting value.Type: ApplicationFiled: December 9, 2014Publication date: May 28, 2015Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Yasuyuki FUJIWARA
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Patent number: 8947145Abstract: A PWM signal generation circuit according to the present invention includes a duty setting unit (10) configured to generate a duty control signal designating a duty ratio corresponding to each period of a PWM signal on the basis of an initial duty setting signal, a target duty setting signal, a slope setting signal, and a clock signal, a period setting unit (20) configured to output a period setting value, and an output control unit (30) configured to generate the PWM signal having a period corresponding to the period setting value and having a duty ratio corresponding to a value of the duty control signal. The duty setting unit (10) increases the value of the initial duty ratio to the value of the target duty ratio each time the number of a clock pulse of the clock signal reaches the period setting value reaches the slope setting value.Type: GrantFiled: February 24, 2012Date of Patent: February 3, 2015Assignee: Renesas Electronics CorporationInventor: Yasuyuki Fujiwara
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Patent number: 8702864Abstract: In a method for growing a silicon carbide single crystal on a silicon carbide single crystal substrate by contacting the substrate with a solution containing C prepared by dissolving C into the melt that contains Cr and X, which consists of at least one element of Ce and Nd, such that a proportion of Cr in a whole composition of the melt is in a range of 30 to 70 at. %, and a proportion of X in the whole composition of the melt is in a range of 0.5 at. % to 20 at. % in the case where X is Ce, or in a range of 1 at. % to 25 at. % in the case where X is Nd, and the silicon carbide single crystal is grown from the solution.Type: GrantFiled: January 14, 2009Date of Patent: April 22, 2014Assignee: Toyota Jidosha Kabushiki KaishaInventors: Yukio Terashima, Yasuyuki Fujiwara
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Patent number: 8685163Abstract: A method for growing a silicon carbide single crystal on a single crystal substrate comprising the steps of heating silicon in a graphite crucible to form a melt, bringing a silicon carbide single crystal substrate into contact with the melt, and depositing and growing a silicon carbide single crystal from the melt, wherein the melt comprises 30 to 70 percent by atom, based on the total atoms of the melt, of chromium and 1 to 25 percent by atom, based on the total atoms of the melt, of X, where X is at least one selected from the group consisting of nickel and cobalt, and carbon. It is possible to improve morphology of a surface of the crystal growth layer obtained by a solution method.Type: GrantFiled: November 18, 2008Date of Patent: April 1, 2014Assignee: Toyota Jidosha Kabushiki KaishaInventors: Yukio Terashima, Yasuyuki Fujiwara
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Publication number: 20140009081Abstract: A PWM signal generation circuit according to the present invention includes a duty setting unit (10) configured to generate a duty control signal designating a duty ratio corresponding to each period of a PWM signal on the basis of an initial duty setting signal, a target duty setting signal, a slope setting signal, and a clock signal, a period setting unit (20) configured to output a period setting value, and an output control unit (30) configured to generate the PWM signal having a period corresponding to the period setting value and having a duty ratio corresponding to a value of the duty control signal. The duty setting unit (10) increases the value of the initial duty ratio to the value of the target duty ratio each time the number of a clock pulse of the clock signal reaches the period setting value reaches the slope setting value.Type: ApplicationFiled: February 24, 2012Publication date: January 9, 2014Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Yasuyuki Fujiwara