Patents by Inventor Yasuyuki Mashimo

Yasuyuki Mashimo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10529487
    Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which internal electrodes and dielectric layers are alternately stacked; a first external electrode connected to a subset of the internal electrodes; and a second external electrode sandwiching the multilayer structure with the first external electrode in a first direction is connected to another subset of the internal electrodes, wherein t12×W1/N is equal to or more than 0.1, when a distance between a first edge positioned at outermost of the internal electrodes in a second direction intersecting with the first direction in a plane direction of the internal electrodes and the dielectric layers and a second edge positioned at innermost of the internal electrodes in the second direction is W1 (mm), each thickness of the plurality of dielectric layers is t1 (?m), and a stack number of the plurality of dielectric layers is N.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: January 7, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Masaki Mochigi, Yousuke Nakada, Shinichi Tsunoda, Yasuyuki Mashimo
  • Patent number: 10347428
    Abstract: A multilayer ceramic capacitor includes: a multilayer structure having an internal electrode and a dielectric layer alternately stacked; external electrodes provided on a first and second faces of the multilayer structure, wherein t12×L1/N is equal to or more than 0.1, when a distance between a first edge positioned at outermost of edges of the plurality of internal electrodes that are not connected to the first external electrode or the second external electrode in an array direction of the first external electrode and the second external electrode and a second edge positioned at innermost of edges of the plurality of internal electrodes that are not connected to the first external electrode or the second external electrode in the array direction is L1 (mm), each thickness of the plurality of dielectric layers is t1 (?m), and a stack number of the plurality of dielectric layers is N.
    Type: Grant
    Filed: June 27, 2017
    Date of Patent: July 9, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Masaki Mochigi, Yousuke Nakada, Shinichi Tsunoda, Yasuyuki Mashimo
  • Publication number: 20180012703
    Abstract: A multilayer ceramic capacitor includes: a multilayer structure having an internal electrode and a dielectric layer alternately stacked; external electrodes provided on a first and second faces of the multilayer structure, wherein t12×L1/N is equal to or more than 0.1, when a distance between a first edge positioned at outermost of edges of the plurality of internal electrodes that are not connected to the first external electrode or the second external electrode in an array direction of the first external electrode and the second external electrode and a second edge positioned at innermost of edges of the plurality of internal electrodes that are not connected to the first external electrode or the second external electrode in the array direction is L1 (mm), each thickness of the plurality of dielectric layers is t1 (?m), and a stack number of the plurality of dielectric layers is N.
    Type: Application
    Filed: June 27, 2017
    Publication date: January 11, 2018
    Inventors: Masaki MOCHIGI, Yousuke NAKADA, Shinichi TSUNODA, Yasuyuki MASHIMO
  • Publication number: 20170352483
    Abstract: A multilayer ceramic capacitor includes: a multilayer structure in which internal electrodes and dielectric layers are alternately stacked; a first external electrode connected to a subset of the internal electrodes; and a second external electrode sandwiching the multilayer structure with the first external electrode in a first direction is connected to another subset of the internal electrodes, wherein t12×W1/N is equal to or more than 0.1, when a distance between a first edge positioned at outermost of the internal electrodes in a second direction intersecting with the first direction in a plane direction of the internal electrodes and the dielectric layers and a second edge positioned at innermost of the internal electrodes in the second direction is W1 (mm), each thickness of the plurality of dielectric layers is t1 (?m), and a stack number of the plurality of dielectric layers is N.
    Type: Application
    Filed: May 24, 2017
    Publication date: December 7, 2017
    Inventors: Masaki MOCHIGI, Yousuke NAKADA, Shinichi TSUNODA, Yasuyuki MASHIMO
  • Patent number: 6325919
    Abstract: A catalyst carrier composed of a refractory inorganic oxide has a rotationally symmetrical shape having a hollow portion, such as a doughnut shape. An outer peripheral surface and the inner peripheral surface separating the hollow portion are linked by curved surfaces, and the height h of the carrier along the rotational symmetry axis is less than the outer diameter Do of the carrier. Using a catalyst having this carrier shape for a fixed bed makes it possible to prevent granular substances from causing catalyst plugging, and catalyst life can be extended because the catalyst-induced differential pressure increase is low even when granular substances accumulate on the catalyst. It is also possible to prevent the reaction fluid from undergoing channeling. Also provided is a hydrogenation reactor whose fixed bed is packed with the catalyst.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: December 4, 2001
    Assignee: Japan Energy Corportion
    Inventors: Hiroki Koyama, Kenji Nakamura, Masayuki Kawaguchi, Yasuyuki Mashimo