Patents by Inventor Yasuyuki Morishita

Yasuyuki Morishita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5529956
    Abstract: After an interlayer insulator film is deposited on a wiring conductor formed on a semiconductor device element and is then planarized, a first conducting film and a first insulating film are deposited in the named order. Thereafter, a through hole is formed, and a second conducting film and a second insulating film are deposited and then etched back so that these films remain on only a side wall surface of the through hole. Furthermore, the through hole is filled with a metal plating, and then, the etching-back is performed again. Thereafter, an upper level wiring conductor is plating-grown by supplying an electric current to-the first conducting film , and the second conducting film remaining on the side wall surface and the lower level wiring conductor.
    Type: Grant
    Filed: September 28, 1994
    Date of Patent: June 25, 1996
    Assignee: NEC Corporation
    Inventor: Yasuyuki Morishita