Patents by Inventor Yasuyuki Ozawa
Yasuyuki Ozawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10789125Abstract: A memory system includes a plurality of memory cells and a controller. During a write operation to write data to the memory cells, the controller encodes first data to be written at a first code rate. During a read operation to read data from the memory cells, the controller decodes second data read from the memory cells at the first code rate. The controller changes the first code rate to a second code rate that is less than the first code rate upon determining that the number of error bits during the read operation of the second data is above a threshold number for error bits or upon determining that the number of memory cells having a threshold voltage that is in a voltage range that includes a read voltage is above a threshold number for memory cells.Type: GrantFiled: April 10, 2019Date of Patent: September 29, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Katsuhiko Ueki, Sumio Kuroda, Yasuyuki Ozawa
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Publication number: 20190235952Abstract: A memory system includes a plurality of memory cells and a controller. During a write operation to write data to the memory cells, the controller encodes first data to be written at a first code rate. During a read operation to read data from the memory cells, the controller decodes second data read from the memory cells at the first code rate. The controller changes the first code rate to a second code rate that is less than the first code rate upon determining that the number of error bits during the read operation of the second data is above a threshold number for error bits or upon determining that the number of memory cells having a threshold voltage that is in a voltage range that includes a read voltage is above a threshold number for memory cells.Type: ApplicationFiled: April 10, 2019Publication date: August 1, 2019Inventors: Katsuhiko UEKI, Sumio KURODA, Yasuyuki OZAWA
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Patent number: 10261857Abstract: A memory system includes a memory that includes a plurality of memory cells, and a controller. During a write operation to write data to the memory cells, the controller encodes first data to be written at a first code rate. During a read operation to read data from the memory cells, the controller decodes second data read from the memory cells at the first code rate. The controller changes the first code rate to a second code rate that is less than the first code rate upon determining that the number of error bits during the read operation of the second data is above a threshold number for error bits or upon determining that the number of memory cells having a threshold voltage that is in a voltage range that includes a read voltage is above a threshold number for memory cells.Type: GrantFiled: March 3, 2017Date of Patent: April 16, 2019Assignee: Toshiba Memory CorporationInventors: Katsuhiko Ueki, Sumio Kuroda, Yasuyuki Ozawa
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Patent number: 9940192Abstract: According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.Type: GrantFiled: October 30, 2014Date of Patent: April 10, 2018Assignee: TOSHIBA MEMORY CORPORATIONInventors: Fubito Igari, Hiroyuki Suto, Yasuyuki Ozawa
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Publication number: 20180076829Abstract: A memory system includes a memory that includes a plurality of memory cells, and a controller. During a write operation to write data to the memory cells, the controller encodes first data to be written at a first code rate. During a read operation to read data from the memory cells, the controller decodes second data read from the memory cells at the first code rate. The controller changes the first code rate to a second code rate that is less than the first code rate upon determining that the number of error bits during the read operation of the second data is above a threshold number for error bits or upon determining that the number of memory cells having a threshold voltage that is in a voltage range that includes a read voltage is above a threshold number for memory cells.Type: ApplicationFiled: March 3, 2017Publication date: March 15, 2018Inventors: Katsuhiko UEKI, Sumio KURODA, Yasuyuki OZAWA
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Patent number: 9788463Abstract: A semiconductor memory device includes a semiconductor memory unit, a memory controller, a cover unit having a first portion covering the semiconductor memory unit and a second portion covering the memory controller, a first heat conduction member disposed between the semiconductor memory unit and the first portion of the cover unit, and a second heat conduction member disposed between the memory controller and the second portion of the cover. The cover unit has a gap formed between the first and second portions.Type: GrantFiled: September 1, 2015Date of Patent: October 10, 2017Assignee: Toshiba Memory CorporationInventors: Yasuyuki Ozawa, Fuminori Kimura, Masaaki Niijima, Masahiro Iijima, Yoshiharu Matsuda, Kenichi Sawanaka, Kazuhiro Yoshida
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Publication number: 20160270266Abstract: A semiconductor memory device includes a semiconductor memory unit, a memory controller, a cover unit having a first portion covering the semiconductor memory unit and a second portion covering the memory controller, a first heat conduction member disposed between the semiconductor memory unit and the first portion of the cover unit, and a second heat conduction member disposed between the memory controller and the second portion of the cover. The cover unit has a gap formed between the first and second portions.Type: ApplicationFiled: September 1, 2015Publication date: September 15, 2016Inventors: Yasuyuki OZAWA, Fuminori KIMURA, Masaaki NIIJIMA, Masahiro IIJIMA, Yoshiharu MATSUDA, Kenichi SAWANAKA, Kazuhiro YOSHIDA
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Publication number: 20150052414Abstract: According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.Type: ApplicationFiled: October 30, 2014Publication date: February 19, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Fubito IGARI, Hiroyuki Suto, Yasuyuki Ozawa
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Patent number: 8918699Abstract: According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.Type: GrantFiled: January 29, 2013Date of Patent: December 23, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Fubito Igari, Hiroyuki Suto, Yasuyuki Ozawa
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Publication number: 20140040701Abstract: According to one embodiment, a non-volatile semiconductor storage apparatus is configured to decide determination periods respectively corresponding to each of management blocks based on rewrite count information items and a temperature, and to perform a determination processing for each of management blocks for each determination period. The determination processing includes determining whether first data read from a block in the blocks is normal based on the number of errors that are occurred in the first data. The apparatus is configured to perform a rewrite processing of rewriting the first data to second data which is error-corrected when it is determined that the first data is not normal.Type: ApplicationFiled: January 29, 2013Publication date: February 6, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Fubito IGARI, Hiroyuki Suto, Yasuyuki Ozawa
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Publication number: 20100226036Abstract: According to one embodiment, a magnetic disk of a patterned media type, has a plurality of zones divided in radial direction on a magnetic recording surface. A plurality of segments which are included in each of the zones includes a data recording area composed of data recording unit of magnetic material and a first resync area in which a reference signal pattern for setting the timing of writing data in the data recording area has been recorded. The number of segments included in each of the zones is an integer and has a common divisor.Type: ApplicationFiled: March 2, 2010Publication date: September 9, 2010Applicant: TOSHIBA STORAGE DEVICE CORPORATIONInventor: Yasuyuki Ozawa
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Publication number: 20100123973Abstract: According to one embodiment, an information storage medium includes a plurality of sectors arranged in a circumferential direction of a disk-shaped substrate, each sector having a servo pattern that is formed on the substrate and in which information indicating a position in a radial direction of the substrate is magnetically recorded, and a plurality of recording dots that is arranged with a predetermined pitch in the circumferential direction of the substrate and in which information is to be magnetically recorded. The servo pattern has a magnetic pattern arranged in the circumferential direction with a pitch having a predetermined integral ratio to the pitch of the recording dots. A recording dot arranged nearest to the servo pattern among the recording dots in each sector is arranged at a position having a constant phase relationship to the pitch of the servo pattern of the sector comprising the recording dots in any of the sectors.Type: ApplicationFiled: September 29, 2009Publication date: May 20, 2010Applicant: FUJITSU LIMITEDInventors: Yasuyuki Ozawa, Haruhiko Izumi
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Publication number: 20090237829Abstract: An information recording medium has a substrate, first recording dots, and second recording dots. The first recording dots are arranged in an array circumferentially in accordance with a predetermined regulation at mutual intervals in accordance with the regulation at a position in accordance with the regulation, and are used to magnetically record information. The second recording dots are arranged in an array circumferentially in accordance with the regulation at mutual intervals in accordance with the regulation. In the second recording dots, plural kinds of positions having different deviation amounts from the position in accordance with the regulation appear in one round of the array. The second recording dots are also used to magnetically record information.Type: ApplicationFiled: November 21, 2008Publication date: September 24, 2009Applicant: FUJITSU LIMITEDInventors: Yasuyuki Ozawa, Haruhiko Izumi
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Publication number: 20090207523Abstract: A magnetic recording medium formed on a substrate. The magnetic recording medium includes a data region including a plurality of magnetic dots arranged at predetermined positions on the substrate, for recording information; and a servo region for specifying the positions of the magnetic dots, the servo region including a plurality of magnetic segments arranged at predetermined positions on the substrate, each of the magnetic segments being smaller than each of the magnetic dots.Type: ApplicationFiled: February 2, 2009Publication date: August 20, 2009Applicant: FUJITSU LIMITEDInventors: Takayuki Kawabe, Haruhiko Izumi, Yasuyuki Ozawa, Takuya Kamimura
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Patent number: 5473587Abstract: A track retrieval system retrieves a track of an optical disk based on track cross pulses which correspond to a number of tracks scanned by a scan beam. The track retrieval system includes a pulse shaping circuit for generating a pulse at a zero-crossing of a track error signal which is dependent on a tracking error of the scan beam relative to the track, a masking circuit for outputting track cross pulses by masking an output of the pulse shaping circuit for a predetermined time after the pulse is output from the pulse shaping circuit, so that pulses generated by the pulse shaping circuit within the predetermined time due to chattering are eliminated, a counter for counting the track cross pulses output from the masking circuit and for outputting a counted value, and a control unit for setting the predetermined time in the masking circuit based on a moving speed of the scan beam which is calculated from the counted value output from the counter.Type: GrantFiled: September 23, 1994Date of Patent: December 5, 1995Assignee: Fujitsu LimitedInventors: Shingo Hamaguchi, Yasuyuki Ozawa
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Patent number: 5440533Abstract: An optical head unit includes a motor having a stator and a rotor which is mounted rotatably on the stator, at least the rotor having a generally disk-shaped (i.e., circular or polygonal) configuration, and an optical system mounted on a common, main surface of the rotor. The optical system includes a light emitting part for emitting a light beam, a focus actuator, an objective lens provided on the focus actuator, and a light beam receiving part. The light beam emitted from the light emitting part is output via the objective lens, and light received via the objective lens is received by the light receiving part.Type: GrantFiled: October 11, 1994Date of Patent: August 8, 1995Assignee: Fujitsu LimitedInventors: Tohru Fujimaki, Akio Futamata, Yasuyuki Ozawa
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Patent number: 5422867Abstract: An access control circuit for use in an optical disk unit including a linear drive mechanism for linearly sliding an optical head to thereby shift a beam spot to a target track on an optical disk. The slider of the linear drive mechanism and the optical head are integrally structured. The sliding speed of the linear drive mechanism is detected by a speed detection unit and the target speed of the linear drive mechanism is calculated by a target speed calculation unit. The difference between the sliding speed and the target speed is detected by a speed difference detection unit and thereby a speed difference signal is obtained. Then, the speed difference signal and a high-frequency signal from an oscillation unit are added together and the sum signal is output to a current supply unit, and thereby a drive current in accordance with the sum signal is supplied from the current supply unit to the linear drive mechanism to drive the same.Type: GrantFiled: August 25, 1993Date of Patent: June 6, 1995Assignee: Fujitsu LimitedInventors: Shingo Hamaguchi, Yasuyuki Ozawa, Shinichi Ohtsuka
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Patent number: 5313442Abstract: An optical disk drive includes a stationary optical system including a tracking mirror and a movable optical system including an objective lens, wherein the tracking mirror in the stationary optical system is supported movable along a circular path perpendicular to said optical disk, about a center of the circular path located on a hypothetical line that extends from the tracking mirror toward the movable optical system and further beyond the movable optical system. The center of the circular path is set at a distance twice as large as the distance from the tracking mirror to a reference point that is located below a data region defined on the optical disk for recording information.Type: GrantFiled: February 26, 1993Date of Patent: May 17, 1994Assignee: Fujitsu LimitedInventors: Shin'ichi Ohtsuka, Yasuyuki Ozawa