Patents by Inventor Yasuyuki Saza

Yasuyuki Saza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6518090
    Abstract: A semiconductor device includes a circuit board on which a semiconductor chip is mounted via an adhesive resin layer and through which a moisture drain hole is formed. A pit part having a width wider than a diameter of the moisture drain hole is formed in a part of the adhesive resin layer exposed in the moisture drain hole. On this account, the semiconductor device can properly drain moisture to the outside when the semiconductor device is mounted on another packaging substrate by reflowing.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: February 11, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihisa Dotta, Kazuo Tamaki, Yasuyuki Saza
  • Publication number: 20020076858
    Abstract: A semiconductor device includes a circuit board on which a semiconductor chip is mounted via an adhesive resin layer and through which a moisture drain hole is formed. A pit part having a width wider than a diameter of the moisture drain hole is formed in a part of the adhesive resin layer exposed in the moisture drain hole. On this account, the semiconductor device can properly drain moisture to the outside when the semiconductor device is mounted on another packaging substrate by reflowing.
    Type: Application
    Filed: December 4, 2001
    Publication date: June 20, 2002
    Inventors: Yoshihisa Dotta, Kazuo Tamaki, Yasuyuki Saza
  • Patent number: 6353263
    Abstract: When a first semiconductor chip is installed on a circuit substrate by using an anisotropic conductive bonding agent, one portion thereof is allowed to protrude outside the first semiconductor chip. A second semiconductor chip is installed on the first semiconductor chip and a support portion formed by the protruding resin. The protruding portion of the second semiconductor chip is supported by the support portion from under. Thus, in a semiconductor device having a plurality of laminated semiconductor chips in an attempt to achieve a high density, even when, from a semiconductor chip stacked on a circuit substrate, one portion of a semiconductor chip stacked thereon protrudes, it is possible to carry out a better wire bonding process on electrodes formed on the protruding portion.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: March 5, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihisa Dotta, Yasuyuki Saza, Kazuo Tamaki
  • Patent number: 6157080
    Abstract: A semiconductor device package which eliminates the possibility of damages to a solder connected portion of a flip-chip connected chip by load, or which eliminates ultrasonic output at the time of wire bonding is described. Electrodes of a first chip are connected to first connection pads corresponding to the electrodes with the first chip being bonded at its rear surface to a rear surface of a second chip. A first resin is interposed in a gap between the first chip and a circuit board so as not to cover the first or second connection pads. Thereafter, the electrode of the second chip is connected to the second connection pads by wires, and the whole device is overlayed by a second resin.
    Type: Grant
    Filed: November 5, 1998
    Date of Patent: December 5, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuo Tamaki, Yasuyuki Saza, Yoshihisa Dotta