Patents by Inventor Yasuyuki Yoshinaga

Yasuyuki Yoshinaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9711630
    Abstract: A semiconductor device, includes a semiconductor chip which includes: first and second terminals; a first conductive film pattern for the first terminal, formed over an interlayer insulation film; an insulation film formed over the interlayer insulation film so as to cover the first conductive film pattern; a first opening for the first terminal formed in the insulation film, and for exposing a part of the first conductive film pattern; and a nickel film formed over the first conductive film pattern at a portion thereof exposed from the first opening, wherein a semiconductor element controls a conduction between the first terminal and the second terminal, wherein the first terminal is formed of the first conductive film pattern and the nickel film, wherein the first conductive film pattern is formed of a lamination film having a first conductor film containing aluminum, and a second conductor film.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: July 18, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Yasuyuki Yoshinaga, Kenta Sadakata
  • Publication number: 20160155833
    Abstract: A semiconductor device, includes a semiconductor chip which includes: first and second terminals; a first conductive film pattern for the first terminal, formed over an interlayer insulation film; an insulation film formed over the interlayer insulation film so as to cover the first conductive film pattern; a first opening for the first terminal formed in the insulation film, and for exposing a part of the first conductive film pattern; and a nickel film formed over the first conductive film pattern at a portion thereof exposed from the first opening, wherein a semiconductor element controls a conduction between the first terminal and the second terminal, wherein the first terminal is formed of the first conductive film pattern and the nickel film, wherein the first conductive film pattern is formed of a lamination film having a first conductor film containing aluminum, and a second conductor film.
    Type: Application
    Filed: January 27, 2016
    Publication date: June 2, 2016
    Inventors: Yasuyuki YOSHINAGA, Kenta SADAKATA
  • Patent number: 9263561
    Abstract: The reliability of a semiconductor device is improved. The semiconductor device includes a wire which is a conductive film pattern for a terminal formed over a first insulation film over a semiconductor substrate, a second insulation film formed over the first insulation film in such a manner as to cover the wire, and a nickel layer formed over the wire at a portion thereof exposed from an opening in the second insulation film. The wire is formed of a lamination film having a main conductor film containing aluminum as a main component, and a conductor film formed over the entire top surface of the main conductor film. The conductor film is formed of a titanium film, a tungsten film, or a titanium tungsten film. The nickel layer is formed over the conductor film at a portion thereof exposed from the opening.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: February 16, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Yasuyuki Yoshinaga, Kenta Sadakata
  • Publication number: 20150364587
    Abstract: The reliability of a semiconductor device is improved. The semiconductor device includes a wire which is a conductive film pattern for a terminal formed over a first insulation film over a semiconductor substrate, a second insulation film formed over the first insulation film in such a manner as to cover the wire, and a nickel layer formed over the wire at a portion thereof exposed from an opening in the second insulation film. The wire is formed of a lamination film having a main conductor film containing aluminum as a main component, and a conductor film formed over the entire top surface of the main conductor film. The conductor film is formed of a titanium film, a tungsten film, or a titanium tungsten film. The nickel layer is formed over the conductor film at a portion thereof exposed from the opening.
    Type: Application
    Filed: June 5, 2015
    Publication date: December 17, 2015
    Inventors: Yasuyuki YOSHINAGA, Kenta SADAKATA
  • Patent number: 8217424
    Abstract: It is desired for semiconductor devices to reduce leakage currents. In a semiconductor device having a stacked structure including a GaAs layer and an InGaP layer, p-type impurity is doped to the GaAs layer. Consequently, the conduction band of the GaAs is raised to higher than the Fermi level. As a result, electron accumulation is suppressed and the gate leakage current can be reduced.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: July 10, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yasuyuki Yoshinaga, Yasunori Bito
  • Publication number: 20110169053
    Abstract: A semiconductor device includes an undoped InGaAs layer; an Si-doped GaAs layer formed thereover and equipped with a first recess portion; a two-layered semiconductor layer formed between the undoped InGaAs layer and the Si-doped GaAs layer, equipped with a second recess portion provided in the first recess portion, and composed of an undoped ordered InGaP layer and an undoped GaAs layer formed thereover; a C-doped GaAs layer provided over the undoped InGaAs layer in the second recess portion; and a sidewall insulating film provided between the C-doped GaAs layer and the interface between the undoped GaAs layer and the undoped ordered InGaP layer, but not provided at a portion between the undoped ordered InGaP layer and the C-doped GaAs layer.
    Type: Application
    Filed: January 11, 2011
    Publication date: July 14, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: YASUYUKI YOSHINAGA
  • Publication number: 20100052013
    Abstract: It is desired for semiconductor devices to reduce leakage currents. In a semiconductor device having a stacked structure including a GaAs layer and an InGaP layer, p-type impurity is doped to the GaAs layer. Consequently, the conduction band of the GaAs is raised to higher than the Fermi level. As a result, electron accumulation is suppressed and the gate leakage current can be reduced.
    Type: Application
    Filed: August 27, 2009
    Publication date: March 4, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Yasuyuki YOSHINAGA, Yasunori BITO