Abstract: A method for reducing power consumption in an integrated circuit and an integrated circuit having a power reduction feature. The integrated circuit has at least two functional circuit blocks and two upper supply rails. A first upper supply rail is coupled to the first functional circuit block and a second upper supply rail is coupled to the second functional circuit block. A lower supply rail is coupled to the first and second functional circuit blocks. In an active mode of operation, a first source of operating potential is electrically coupled to the first upper supply rail and a second source of operating potential is electrically coupled to the second upper supply rail. In an idle mode of operation, the first upper supply rail remains electrically coupled to the first source of operating potential and the second source of operating potential is electrically decoupled from the second functional circuit block.

Abstract: A method for providing a shared write driver is provided. The method includes providing a write driver for a memory array. The memory array comprises a plurality of memory columns. The write driver is coupled to the plurality of memory columns.

Abstract: A method for providing a low power memory array is provided. The method includes partitioning a memory array into at least two memory sections. Each memory section comprises a plurality of memory cells. A sense amplifier is provided for the memory sections. An operation request for a specified memory cell in one of the memory sections is received. The memory section comprising the specified memory cell is accessed. The requested operation is performed on the specified memory cell.