Abstract: An heat treatment (anneal) process is provided that reduces stress in a metal layer structure having ARC TiN layer overlaying an aluminum layer formed in a high temperature process. An metal layer 32 composed of Al/Cu/Si is sputtered at a temperature of about 505.degree. C. on a semiconductor structure 10. Next, an ARC TiN layer 34 is deposited over the metal layer 32. In an important process, a heat treatment (anneal) is performed on the metal layer 32 and the ARC TiN layer 34. The heat treatment comprises three steps. First, a ramp up step is performed wherein the temperature is increased from room temperature to a temperature of about 450.degree. C. at a rate of about 40.degree. C./sec. Second, a temperature hold step is performed where the temperature is held at about 450.degree. C. for a time of about 30 seconds. Third, a ramp down step is performed where the temperature is ramped down at rate in a range of between about 8 and 10.degree. C./sec to room temperature.

Abstract: A process for forming aluminum based interconnect structures, with a reduced risk of void formation, occurring during photoresist removal and clean up procedures, has been developed. The process features removing the photoresist layer, used as a mask for patterning of an aluminum based layer, using a two phase, in situ photoresist removal procedure, followed by a cold water rinse. An aluminum oxide layer, formed during the initial phase of the two phase, in situ photoresist removal procedure, protects the sides of the aluminum based interconnect structure, during post-clean procedures, reducing the risk of galvanic corrosion and void formation. In addition the temperature of a DI water, post-clean procedure, has also been decreased to between about 5 to 10.degree. C., reduced, also reducing the risk of galvanic corrosion, that can occur during the post clean procedures.