Patents by Inventor Yau-feng Lo

Yau-feng Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6465139
    Abstract: The invention is a mask pattern comprising a first region that is strip-shaped and has two long sides and two short sides, and two second regions that are strip-shaped with each region having two long sides and two short sides, in which the short sides of the second regions are shorter than the sides of the first region, and the second regions extend in a lengthwise direction from the two short sides of the first region, respectively, with the short sides of the second regions adjacent to the short sides of the first region. The mask pattern is used to define a floating gate region in a flash memory.
    Type: Grant
    Filed: June 5, 2000
    Date of Patent: October 15, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yau-feng Lo, Shiou-han Liaw, Jiaren Chen, Paul Chuang, Calvin Wu, Maxwell Lai
  • Patent number: 6319762
    Abstract: A method for fabricating poly-spacers used in a semiconductor substrate, comprising: forming an undoped first polysilicon layer on the semiconductor substrate; performing a first ion implantation with a first angle to implant impurities into the first polysilicon layer; performing a second ion implantation with a second angle to implant the impurities into the first polysilicon layer; forming a second polysilicon layer on the first polysilicon layer; and etching the first polysilicon layer and the second polysilicon layer to form spacers.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: November 20, 2001
    Assignee: TSMC-ACER Semiconductor Manufacturing Corp.
    Inventors: Shiou-han Liaw, Yau-feng Lo, Po-lung Chuang, Jia-ren Chen, Yen-hung Lai, Calvin Wu