Patents by Inventor Yau-Wai Wong

Yau-Wai Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10426035
    Abstract: A substrate having multiple metal layers is disclosed. The substrate includes a plurality of metal layers disposed in different levels. The plurality of metal layers includes a lower metal layer, a middle metal layer situated overlying the lower layer, and an upper metal layer situated overlying the middle metal layer. A solder mask covers the upper metal layer. A reference plane is arranged in the lower metal layer. A trio of signal traces is arranged in the middle metal layer. The trio of signal traces comprises at least a pair of differential signal traces. A plurality of reference nets is arranged in the middle metal layer.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: September 24, 2019
    Assignee: MEDIATEK INC.
    Inventors: Nan-Jang Chen, Yau-Wai Wong
  • Publication number: 20180329851
    Abstract: The present invention provides a USB interface circuit comprising a USB transceiver and at least two USB controllers of different protocol types; wherein at least one USB transceiver is selectively coupled to at least two USB controllers and is controlled by only one of the at least two USB controllers at the same time. The invention also provides a USB device.
    Type: Application
    Filed: May 14, 2018
    Publication date: November 15, 2018
    Inventors: Yuping Leng, Yau-Wai Wong, Yong Wang, Yuan Chen, Dingjun Xu, Ming-Feng Lin
  • Publication number: 20180206339
    Abstract: A substrate having multiple metal layers is disclosed. The substrate includes a plurality of metal layers disposed in different levels. The plurality of metal layers includes a lower metal layer, a middle metal layer situated overlying the lower layer, and an upper metal layer situated overlying the middle metal layer. A solder mask covers the upper metal layer. A reference plane is arranged in the lower metal layer. A trio of signal traces is arranged in the middle metal layer. The trio of signal traces comprises at least a pair of differential signal traces. A plurality of reference nets is arranged in the middle metal layer.
    Type: Application
    Filed: March 15, 2018
    Publication date: July 19, 2018
    Inventors: Nan-Jang Chen, Yau-Wai Wong
  • Patent number: 9955581
    Abstract: A printed circuit board (PCB) assembly includes a PCB having a core substrate, a plurality of conductive traces on a first surface of the PCB, and a ground layer on the second surface of the PCB. The conductive traces comprise a pair of differential signal traces. An intervening reference trace is disposed between the differential signal traces. A connector is disposed at one end of the plurality of conductive traces. A semiconductor package is mounted on the first surface at the other end of the plurality of conductive traces.
    Type: Grant
    Filed: January 10, 2016
    Date of Patent: April 24, 2018
    Assignee: MEDIATEK INC.
    Inventors: Nan-Jang Chen, Yau-Wai Wong
  • Publication number: 20160120034
    Abstract: A printed circuit board (PCB) assembly includes a PCB having a core substrate, a plurality of conductive traces on a first surface of the PCB, and a ground layer on the second surface of the PCB. The conductive traces comprise a pair of differential signal traces. An intervening reference trace is disposed between the differential signal traces. A connector is disposed at one end of the plurality of conductive traces. A semiconductor package is mounted on the first surface at the other end of the plurality of conductive traces.
    Type: Application
    Filed: January 10, 2016
    Publication date: April 28, 2016
    Inventors: Nan-Jang Chen, Yau-Wai Wong
  • Patent number: 9269653
    Abstract: A printed circuit board (PCB) assembly includes a PCB having a core substrate, a plurality of conductive traces on a first surface of the PCB, and a ground layer on the second surface of the PCB. The conductive traces comprise a pair of differential signal traces. An intervening reference trace is disposed between the differential signal traces. A connector is disposed at one end of the plurality of conductive traces. A semiconductor package is mounted on the first surface at the other end of the plurality of conductive traces.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: February 23, 2016
    Assignee: MEDIATEK INC.
    Inventors: Nan-Jang Chen, Yau-Wai Wong
  • Publication number: 20140002935
    Abstract: A printed circuit board (PCB) assembly includes a PCB having a core substrate, a plurality of conductive traces on a first surface of the PCB, and a ground layer on the second surface of the PCB. The conductive traces comprise a pair of differential signal traces. An intervening reference trace is disposed between the differential signal traces. A connector is disposed at one end of the plurality of conductive traces. A semiconductor package is mounted on the first surface at the other end of the plurality of conductive traces.
    Type: Application
    Filed: May 13, 2013
    Publication date: January 2, 2014
    Inventors: Nan-Jang Chen, Yau-Wai Wong
  • Patent number: 8462960
    Abstract: A signal processing system and related method are disclosed. The signal processing system includes a signal processing module, powered by a low supply voltage, for processing signals; and an interface module, coupled to the signal processing module, powered by a high supply voltage, for outputting signals generated from the signal processing module; wherein the interface module comprises a plurality of high-voltage functional blocks integrated therein, and each of the functional blocks is configured to perform a predetermined interface functionality. In this way, the bill-of-material (BOM) cost can be reduced.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: June 11, 2013
    Assignee: Mediatek Inc.
    Inventors: Sheng-Jui Huang, Yung-Yu Lin, Jen-Che Tsai, Tzueng-Yau Lin, Yau-Wai Wong, Chih-Horng Weng, Chi-Hui Wang
  • Patent number: 8218793
    Abstract: An apparatus and a muting circuit. The apparatus comprises an amplifier, a mute circuit, a pull-down circuit, and a power detection circuit. The amplifier receives a power supply voltage and a common mode voltage, and amplifies an audio input signal to generate an audio output signal. The mute circuit, coupled to the amplifier, conducts the audio output signal to about ground level upon receiving a mute signal. The pull-down circuit, coupled to the amplifier, pulls the common mode voltage to about ground level upon receiving a pull-down signal. The power detection circuit, coupled to the mute circuit and the pull-down circuit, detects power-up or power-down of the power supply voltage, and generates the mute signal and a pull-down signal according to the power-up or power-down operation.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: July 10, 2012
    Assignee: Mediatek Inc.
    Inventors: Jen-Che Tsai, Yau-Wai Wong
  • Publication number: 20120018862
    Abstract: A semiconductor package includes a die pad; a semiconductor die mounted on the die pad; a plurality of leads in a first horizontal plane disposed along peripheral edges of the die pad; a ground bar downset from the first horizontal plane to a second horizontal plane between the leads and the die pad; a plurality of downset tie bars connecting the ground bar with the die pad; a plurality of ground wires bonding to both of the ground bar and the die pad; and a molding compound at least partially encapsulating the die pad, inner ends of the leads such that bottom surface of the die pad is exposed within the molding compound.
    Type: Application
    Filed: September 29, 2011
    Publication date: January 26, 2012
    Inventors: Nan-Jang Chen, Yau-Wai Wong
  • Patent number: 8058720
    Abstract: A semiconductor package includes a die pad; a semiconductor die mounted on the die pad; a plurality of leads in a first horizontal plane disposed along peripheral edges of the die pad; a ground bar downset from the first horizontal plane to a second horizontal plane between the leads and the die pad; a plurality of downset tie bars connecting the ground bar with the die pad; a plurality of ground wires bonding to both of the ground bar and the die pad; and a molding compound at least partially encapsulating the die pad, inner ends of the leads such that bottom surface of the die pad is exposed within the molding compound.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: November 15, 2011
    Assignee: Mediatek Inc.
    Inventors: Nan-Jang Chen, Yau-Wai Wong
  • Publication number: 20100123226
    Abstract: A semiconductor package includes a die pad; a semiconductor die mounted on the die pad; a plurality of leads in a first horizontal plane disposed along peripheral edges of the die pad; a ground bar downset from the first horizontal plane to a second horizontal plane between the leads and the die pad; a plurality of downset tie bars connecting the ground bar with the die pad; a plurality of ground wires bonding to both of the ground bar and the die pad; and a molding compound at least partially encapsulating the die pad, inner ends of the leads such that bottom surface of the die pad is exposed within the molding compound.
    Type: Application
    Filed: November 19, 2008
    Publication date: May 20, 2010
    Inventors: Nan-Jang Chen, Yau-Wai Wong
  • Publication number: 20090296950
    Abstract: A signal processing system and related method are disclosed. The signal processing system includes a signal processing module, powered by a low supply voltage, for processing signals; and an interface module, coupled to the signal processing module, powered by a high supply voltage, for outputting signals generated from the signal processing module; wherein the interface module comprises a plurality of high-voltage functional blocks integrated therein, and each of the functional blocks is configured to perform a predetermined interface functionality. In this way, the bill-of-material (BOM) cost can be reduced.
    Type: Application
    Filed: May 28, 2008
    Publication date: December 3, 2009
    Inventors: Sheng-Jui Huang, Yung-Yu Lin, Jen-Che Tsai, Tzueng-Yau Lin, Yau-Wai Wong, Chih-Horng Weng, Chi-Hui Wang
  • Publication number: 20080137882
    Abstract: An apparatus and a muting circuit. The apparatus comprises an amplifier, a mute circuit, a pull-down circuit, and a power detection circuit. The amplifier receives a power supply voltage and a common mode voltage, and amplifies an audio input signal to generate an audio output signal. The mute circuit, coupled to the amplifier, conducts the audio output signal to about ground level upon receiving a mute signal. The pull-down circuit, coupled to the amplifier, pulls the common mode voltage to about ground level upon receiving a pull-down signal. The power detection circuit, coupled to the mute circuit and the pull-down circuit, detects power-up or power-down of the power supply voltage, and generates the mute signal and a pull-down signal according to the power-up or power-down operation.
    Type: Application
    Filed: December 4, 2007
    Publication date: June 12, 2008
    Applicant: MEDIATEK INC.
    Inventors: Jen-Che Tsai, Yau Wai Wong